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SN54AS21 PDF预览

SN54AS21

更新时间: 2024-11-26 22:59:15
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德州仪器 - TI 输入元件
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描述
DUAL 4-INPUT POSITIVE-AND GATES

SN54AS21 数据手册

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SN54ALS21A, SN54AS21, SN74ALS21A, SN74AS21  
DUAL 4-INPUT POSITIVE-AND GATES  
SDAS085B – APRIL 1982 – REVISED DECEMBER 1994  
SN54ALS21A, SN54AS21 . . . J PACKAGE  
SN74ALS21A, SN74AS21 . . . D OR N PACKAGE  
(TOP VIEW)  
Package Options Include Plastic  
Small-Outline (D) Packages, Ceramic Chip  
Carriers (FK), and Standard Plastic (N) and  
Ceramic (J) 300-mil DIPs  
1A  
1B  
V
CC  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
2D  
2C  
NC  
2B  
2A  
2Y  
description  
NC  
1C  
These devices contain two independent 4-input  
positive-AND gates. They perform the Boolean  
functions Y = A B C D or Y = A + B + C + D  
in positive logic.  
1D  
1Y  
GND  
8
The SN54ALS21A and SN54AS21 are  
characterized for operation over the full military  
temperature range of 55°C to 125°C. The  
SN74ALS21A and SN74AS21 are characterized  
for operation from 0°C to 70°C.  
SN54ALS21A, SN54AS21 . . . FK PACKAGE  
(TOP VIEW)  
3
2
1
20 19  
18  
FUNCTION TABLE  
(each gate)  
NC  
NC  
1C  
NC  
1D  
4
5
6
7
8
2C  
NC  
NC  
NC  
2B  
17  
16  
15  
14  
INPUTS  
OUTPUT  
Y
A
H
L
B
C
H
X
X
L
D
H
X
X
X
L
H
X
L
H
L
L
L
L
9 10 11 12 13  
X
X
X
X
X
X
NC – No internal connection  
logic symbol  
logic diagram (positive logic)  
1
1
&
1A  
1A  
2
2
1B  
1B  
4
6
6
1Y  
4
5
1Y  
2Y  
1C  
1D  
1C  
5
1D  
9
2A  
9
2A  
10  
2B  
8
10  
12  
2B  
2C  
8
12  
2Y  
2C  
13  
2D  
13  
2D  
This symbol is in accordance with ANSI/IEEE Std 91-1984 and  
IEC Publication 617-12.  
Pin numbers shown are for the D, J, and N packages.  
Copyright 1994, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN54AS21 替代型号

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