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SN54ALVTH162244

更新时间： 2024-09-29 23:03:03
品牌 Logo 应用领域
德州仪器 - TI 输出元件驱动
页数 文件大小 规格书
13页 253K
描述
2.5-V/3.3-V 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

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SN54ALVTH162244 数据手册

 浏览型号SN54ALVTH162244的Datasheet PDF文件第2页浏览型号SN54ALVTH162244的Datasheet PDF文件第3页浏览型号SN54ALVTH162244的Datasheet PDF文件第4页浏览型号SN54ALVTH162244的Datasheet PDF文件第5页浏览型号SN54ALVTH162244的Datasheet PDF文件第6页浏览型号SN54ALVTH162244的Datasheet PDF文件第7页 
SN54ALVTH162244, SN74ALVTH162244  
2.5-V/3.3-V 16-BIT BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCES074E – JUNE 1996 - REVISED JANUARY 1999  
SN54ALVTH162244 . . . WD PACKAGE  
SN74ALVTH162244 . . . DGG, DGV, OR DL PACKAGE  
(TOP VIEW)  
State-of-the-Art Advanced BiCMOS  
Technology (ABT) Widebus Design for  
2.5-V and 3.3-V Operation and Low Static  
Power Dissipation  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
1OE  
1Y1  
1Y2  
GND  
1Y3  
1Y4  
2OE  
1A1  
1A2  
GND  
1A3  
1A4  
Support Mixed-Mode Signal Operation (5-V  
Input and Output Voltages With 2.3-V to  
2
3
3.6-V V  
)
CC  
4
Typical V  
< 0.8 V at V  
(Output Ground Bounce)  
5
OLP  
= 3.3 V, T = 25°C  
6
CC  
A
7
V
V
Power Off Disables Outputs, Permitting  
Live Insertion  
CC  
CC  
8
2Y1  
2Y2  
GND  
2Y3  
2Y4  
3Y1  
3Y2  
GND  
3Y3  
3Y4  
2A1  
2A2  
GND  
2A3  
2A4  
3A1  
3A2  
GND  
3A3  
3A4  
9
High-Impedance State During Power Up  
and Power Down Prevents Driver Conflict  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
Uses Bus Hold on Data Inputs in Place of  
External Pullup/Pulldown Resistors to  
Prevent the Bus From Floating  
Output Ports Have Equivalent 30-Ω Series  
Resistors, So No External Resistors Are  
Required  
Auto3-State Eliminates Bus Current  
V
V
CC  
CC  
Loading When Output Exceeds V  
+ 0.5 V  
CC  
4Y1  
4Y2  
GND  
4Y3  
4Y4  
4OE  
4A1  
4A2  
GND  
4A3  
4A4  
3OE  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model; and Exceeds 1000 V  
Using Charged-Device Model, Robotic  
Method  
Flow-Through Architecture Facilitates  
Printed Circuit Board Layout  
Distributed V  
Minimizes High-Speed Switching Noise  
and GND Pin Configuration  
CC  
Package Options Include Plastic Shrink  
Small-Outline (DL), Thin Shrink  
Small-Outline (DGG), Thin Very  
Small-Outline (DGV) Packages, and 380-mil  
Fine-Pitch Ceramic Flat (WD) Package  
NOTE: For order entry:  
The DGG package is abbreviated to G, and  
the DGV package is abbreviated to V.  
description  
The ’ALVTH162244 devices are 16-bit buffers/line drivers designed for low-voltage 2.5-V or 3.3-V V  
operation, but with the capability to provide a TTL interface to a 5-V system environment.  
CC  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments Incorporated.  
Copyright 1999, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...13

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