5秒后页面跳转
捷配首页

Datasheet > 逻辑 > 总线驱动器/收发器> SN54ALS652FKR
SN54ALS652FKR PDF预览

SN54ALS652FKR

更新时间： 2024-11-29 13:13:43
品牌 Logo 应用领域
德州仪器 - TI 总线收发器输出元件
页数 文件大小 规格书
22页 332K
描述
ALS SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, CQCC28, CERAMIC, LCC-28

阅读下载

中文翻译

获取价格

SN54ALS652FKR 技术参数

生命周期：Obsolete零件包装代码：QLCC
包装说明：QCCN,针数：28
Reach Compliance Code：unknown风险等级：5.33
Is Samacsys：N其他特性：SELECT INPUT FOR MULTIPLEXED TRANSMISSION OF REGISTERED/REAL TIME DATA
系列：ALSJESD-30 代码：S-CQCC-N28
长度：11.43 mm负载电容（CL）：50 pF
逻辑集成电路类型：REGISTERED BUS TRANSCEIVER位数：8
功能数量：1端口数量：2
端子数量：28最高工作温度：125 °C
最低工作温度：-55 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：CERAMIC, METAL-SEALED COFIRED
封装代码：QCCN封装形状：SQUARE
封装形式：CHIP CARRIER最大电源电流（ICC）：88 mA
传播延迟（tpd）：35 ns认证状态：Not Qualified
座面最大高度：2.03 mm最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：TTL
温度等级：MILITARY端子形式：NO LEAD
端子节距：1.27 mm端子位置：QUAD
宽度：11.43 mmBase Number Matches：1

SN54ALS652FKR 数据手册

 浏览型号SN54ALS652FKR的Datasheet PDF文件第2页浏览型号SN54ALS652FKR的Datasheet PDF文件第3页浏览型号SN54ALS652FKR的Datasheet PDF文件第4页浏览型号SN54ALS652FKR的Datasheet PDF文件第5页浏览型号SN54ALS652FKR的Datasheet PDF文件第6页浏览型号SN54ALS652FKR的Datasheet PDF文件第7页 
SN54ALS652, SN54ALS653, SN54AS651, SN54AS652  
SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652  
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS  
SDAS066F – DECEMBER 1983 – REVISED OCTOBER 1996  
SN54ALS’, SN54AS’ . . . JT PACKAGE  
SN74ALS’, SN74AS’ . . . DW OR NT PACKAGE  
Bus Transceivers/Registers  
Independent Registers and Enables for A  
(TOP VIEW)  
and B Buses  
CLKAB  
SAB  
OEAB  
A1  
V
CC  
Multiplexed Real-Time and Stored Data  
Choice of True or Inverting Data Paths  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
CLKBA  
SBA  
OEBA  
B1  
2
3
Choice of 3-State or Open-Collector  
Outputs to A Bus  
4
A2  
5
Package Options Include Plastic  
A3  
B2  
6
Small-Outline (DW) Packages, Ceramic  
Chip Carriers (FK), and Standard Plastic  
(NT) and Ceramic (JT) 300-mil DIPs  
A4  
B3  
7
A5  
B4  
8
A6  
B5  
9
A7  
B6  
10  
11  
DEVICE  
A OUTPUT  
B OUTPUT  
LOGIC  
A8  
B7  
SN74ALS651A,  
’AS651  
GND 12  
13 B8  
3 State  
3 State  
Inverting  
SN54ALS652,  
SN74ALS652A,  
’AS652  
SN54ALS’, SN54AS’ . . . FK PACKAGE  
3 State  
3 State  
True  
(TOP VIEW)  
’ALS653  
Open Collector  
Open Collector  
3 State  
3 State  
Inverting  
True  
SN74ALS654  
description  
4
3
2 1 28 27 26  
5
6
7
8
9
25 OEBA  
A1  
A2  
A3  
NC  
A4  
A5  
A6  
These devices consist of bus-transceiver circuits,  
D-type flip-flops, and control circuitry arranged for  
multiplexed transmission of data directly from the  
data bus or from the internal storage registers.  
Output-enable (OEAB and OEBA) inputs are  
provided to control the transceiver functions.  
Select-control (SAB and SBA) inputs are provided  
to select real-time or stored data transfer. The  
circuitry used for select control eliminates the  
typical decoding glitch that occurs in a multiplexer  
during the transition between stored and real-time  
data. A low input level selects real-time data, and  
a high input level selects stored data. Figure 1  
24  
23  
22  
21  
20  
19  
B1  
B2  
NC  
B3  
B4  
B5  
10  
11  
12 13 14 15 16 17 18  
NC – No internal connection  
illustrates the four fundamental bus-management functions that can be performed with the octal bus  
transceivers and registers.  
Data on the A or B data bus, or both, can be stored in the internal D-type flip-flops by low-to-high transitions at  
the appropriate clock (CLKAB or CLKBA) terminals, regardless of the select- or output-control terminals. When  
SAB and SBA are in the real-time transfer mode, it is possible to store data without using the internal D-type  
flip-flops by simultaneously enabling OEAB and OEBA. In this configuration, each output reinforces its input.  
When all other data sources to the two sets of bus lines are at high impedance, each set of bus lines remains  
at its last state.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1996, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...22

中文翻译

下载PDF

与SN54ALS652FKR相关器件

型号 品牌 获取价格 描述 数据表
SN54ALS652JT TI

获取价格

 		OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SN54ALS652JT-00 TI

获取价格

 		ALS SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, CDIP24
SN54ALS653 TI

获取价格

 		OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SN54ALS653-1JT TI

获取价格

 		ALS SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, CDIP24, 0.300 INCH, CERAMIC, DI
SN54ALS653FC-00 TI

获取价格

 		ALS SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, CQCC28, CERAMIC, CC-28
SN54ALS653FK TI

获取价格

 		OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SN54ALS653FKR TI

获取价格

 		ALS SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, CQCC28, CERAMIC, LCC-28
SN54ALS653JT TI

获取价格

 		OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SN54ALS653JT-00 TI

获取价格

 		ALS SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, CDIP24
SN54ALS677A TI

获取价格

 		16-BIT ADDRESS COMAPARATORS

与SN54ALS652FKR相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证