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SN54ALS580BJ PDF预览

SN54ALS580BJ

更新时间: 2024-01-14 01:02:35
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器锁存器逻辑集成电路输出元件
页数 文件大小 规格书
7页 111K
描述
OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS

SN54ALS580BJ 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DIP, DIP20,.3Reach Compliance Code:unknown
风险等级:5.89JESD-30 代码:R-XDIP-T20
JESD-609代码:e0逻辑集成电路类型:D LATCH
位数:8功能数量:1
端子数量:20最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
封装主体材料:CERAMIC封装代码:DIP
封装等效代码:DIP20,.3封装形状:RECTANGULAR
封装形式:IN-LINE电源:5 V
认证状态:Not Qualified子类别:FF/Latches
标称供电电压 (Vsup):5 V表面贴装:NO
技术:TTL温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
Base Number Matches:1

SN54ALS580BJ 数据手册

 浏览型号SN54ALS580BJ的Datasheet PDF文件第2页浏览型号SN54ALS580BJ的Datasheet PDF文件第3页浏览型号SN54ALS580BJ的Datasheet PDF文件第4页浏览型号SN54ALS580BJ的Datasheet PDF文件第5页浏览型号SN54ALS580BJ的Datasheet PDF文件第6页浏览型号SN54ALS580BJ的Datasheet PDF文件第7页 
SN54ALS580B, SN74ALS580B, SN74AS580  
OCTAL D-TYPE TRANSPARENT LATCHES  
WITH 3-STATE OUTPUTS  
SDAS277 – JANUARY 1995  
SN54ALS580B . . . J OR W PACKAGE  
SN74ALS580B, SN74AS580 . . . DW OR N PACKAGE  
(TOP VIEW)  
3-State Buffer-Type Outputs Drive Bus  
Lines Directly  
Bus-Structured Pinout  
Inverting-Logic Outputs  
Package Options Include Plastic  
Small-Outline (DW) Packages, Ceramic  
Chip Carriers (FK), Standard Plastic (N) and  
Ceramic (J) 300-mil DIPs, and Ceramic Flat  
(W) Packages  
OE  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
V
CC  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
1Q  
2Q  
3Q  
4Q  
5Q  
6Q  
description  
13 7Q  
12 8Q  
These octal D-type transparent latches feature  
3-state outputs designed specifically for driving  
highly capacitive or relatively low-impedance  
loads. They are particularly suitable for  
implementing buffer registers, I/O ports,  
bidirectional bus drivers, and working registers.  
11  
GND  
LE  
SN54ALS580B . . . FK PACKAGE  
(TOP VIEW)  
While the latch-enable (LE) input is high, outputs  
(Q) respond to the data (D) inputs. When LE islow,  
the outputs are latched to retain the data that was  
set up.  
3
2
1
20 19  
18  
2Q  
3Q  
4Q  
5Q  
6Q  
3D  
4D  
5D  
6D  
7D  
4
5
6
7
8
17  
16  
15  
14  
A buffered output-enable (OE) input can be used  
to place the eight outputs in either a normal logic  
state (high or low) or a high-impedance state. In  
thehigh-impedancestate, theoutputsneitherload  
nor drive the bus lines significantly. The  
high-impedance state and the increased drive  
provide the capability to drive bus lines without  
interface or pullup components.  
9 10 11 12 13  
OE does not affect internal operations of the latches. Old data can be retained or new data can be entered while  
the outputs are in the high-impedance state.  
The SN54ALS580B is characterized for operation over the full military temperature range of 55°C to 125°C.  
The SN74ALS580B and SN74AS580 are characterized for operation from 0°C to 70°C.  
FUNCTION TABLE  
(each latch)  
INPUTS  
OUTPUT  
Q
OE  
L
LE  
H
H
L
D
H
L
L
L
H
L
X
X
Q
0
H
X
Z
Copyright 1995, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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