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SN54ALS29821

更新时间： 2024-11-23 04:06:55

品牌	Logo	应用领域
德州仪器 - TI		触发器输出元件
页数	文件大小	规格书
6页	92K
描述
10-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

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SN54ALS29821 数据手册

SN54ALS29821, SN74ALS29821

10-BIT BUS-INTERFACE FLIP-FLOPS

WITH 3-STATE OUTPUTS

SDAS145B – JANUARY 1986 – REVISED JANUARY 1995

SN54ALS29821 . . . JT PACKAGE

SN74ALS29821 . . . DW OR NT PACKAGE

(TOP VIEW)

• Functionally Equivalent to AMD’s AM29821

• Provide Extra Data Width Necessary for

Wider Address/Data Paths or Buses With

Parity

• Outputs Have Undershoot-Protection

23 1Q

22 2Q

21 3Q

20 4Q

19 5Q

18 6Q

17 7Q

16 8Q

15 9Q

14 10Q

13 CLK

Circuitry

• Power-Up High-Impedance State

• Buffered Control Inputs Reduce

dc Loading Effects

• Package Options Include Plastic

Small-Outline (DW) Packages and Standard

Plastic (NT) and Ceramic (JT) 300-mil DIPs

9D 10

10D 11

GND 12

description

These 10-bit edge-triggered D-type flip-flops

feature 3-state outputs designed specifically for

driving highly capacitive or relatively low-impedance loads. These devices are particularly suitable for

implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers.

On the positive transition of the clock (CLK) input, the Q outputs are true to the data (D) input.

A buffered output-enable (OE) input can place the ten outputs in either a normal logic state (high or low logic

levels) or a high-impedance state. The outputs also are in the high-impedance state during power-up and

power-down conditions. The outputs remain in the high-impedance state while the device is powered down. In

the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance

state and increased drive provide the capability to drive bus lines without interface or pullup components.

OE does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered

while the outputs are in the high-impedance state.

The SN54ALS29821 is characterized for operation over the full military temperature range of –55°C to 125°C.

The SN74ALS29821 is characterized for operation from 0°C to 70°C.

FUNCTION TABLE

(each flip-flop)

INPUTS

OUTPUT

CLK

↑

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6

中文翻译

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SN54ALS29821 替代型号

型号	品牌	替代类型	描述	数据表
SN74ALS29821	TI	功能相似	10-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

与SN54ALS29821相关器件

型号	品牌	获取价格	描述	数据表
SN54ALS29821_15	TI	获取价格	10-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN54ALS29821FK	ROCHESTER	获取价格	Bus Driver, ALS Series, 1-Func, 10-Bit, True Output, TTL, CQCC28
SN54ALS29821JT	ROCHESTER	获取价格	Bus Driver, ALS Series, 1-Func, 10-Bit, True Output, TTL, CDIP24, 0.300 INCH, CERAMIC, DIP
SN54ALS29821JT	TI	获取价格	10-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN54ALS29822JT	ROCHESTER	获取价格	ALS SERIES, 10-BIT DRIVER, INVERTED OUTPUT, CDIP24
SN54ALS29823	TI	获取价格	9-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN54ALS29823_15	TI	获取价格	9-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN54ALS29823JT	TI	获取价格	9-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN54ALS29824FK	ROCHESTER	获取价格	ALS SERIES, 9-BIT DRIVER, INVERTED OUTPUT, CQCC28
SN54ALS29824JT	ROCHESTER	获取价格	ALS SERIES, 9-BIT DRIVER, INVERTED OUTPUT, CDIP24

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