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SN54ALS10A PDF预览

SN54ALS10A

更新时间: 2024-11-23 23:06:07
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德州仪器 - TI 输入元件
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6页 98K
描述
TRIPLE 3-INPUT POSITIVE-NAND GATES

SN54ALS10A 数据手册

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SN54ALS10A, SN54AS10, SN74ALS10A, SN74AS10  
TRIPLE 3-INPUT POSITIVE-NAND GATES  
SDAS002B – MARCH 1984 – REVISED DECEMBER 1994  
SN54ALS10A, SN54AS10 . . . J PACKAGE  
SN74ALS10A, SN74AS10 . . . D OR N PACKAGE  
(TOP VIEW)  
Package Options Include Plastic  
Small-Outline (D) Packages, Ceramic Chip  
Carriers (FK), and Standard Plastic (N) and  
Ceramic (J) 300-mil DIPs  
1A  
1B  
V
CC  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
1C  
1Y  
3C  
3B  
3A  
3Y  
description  
2A  
2B  
These devices contain three independent 3-input  
positive-NAND gates. They perform the Boolean  
functions Y = A B C or Y = A + B + C in positive  
logic.  
2C  
2Y  
GND  
8
The SN54ALS10A and SN54AS10 are  
characterized for operation over the full military  
temperature range of 55°C to 125°C. The  
SN74ALS10A and SN74AS10 are characterized  
for operation from 0°C to 70°C.  
SN54ALS10A, SN54AS10 . . . FK PACKAGE  
(TOP VIEW)  
3
2
1
20 19  
18  
FUNCTION TABLE  
(each gate)  
2A  
NC  
2B  
4
5
6
7
8
1Y  
NC  
3C  
NC  
3B  
17  
16  
15  
14  
INPUTS  
OUTPUT  
Y
A
H
L
B
H
X
L
C
H
X
X
L
NC  
2C  
L
H
H
H
9 10 11 12 13  
X
X
X
NC – No internal connection  
logic symbol  
logic diagram (positive logic)  
1
1
1A  
1A  
&
2
2
12  
12  
6
1B  
1C  
1Y  
2Y  
3Y  
1B  
1Y  
2Y  
3Y  
13  
13  
1C  
3
3
4
5
2A  
4
2A  
6
2B  
5
2B  
2C  
2C  
9
3A  
9
10  
8
3A  
3B  
3C  
3B  
10  
11  
8
11  
3C  
This symbol is in accordance with ANSI/IEEE Std 91-1984 and  
IEC Publication 617-12.  
Pin numbers shown are for the D, J, and N packages.  
Copyright 1994, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN54ALS10A 替代型号

型号 品牌 替代类型 描述 数据表
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