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SN54AHCT126_03 PDF预览

SN54AHCT126_03

更新时间: 2024-11-06 05:18:19
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德州仪器 - TI /
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15页 376K
描述
QUADRUPLE BUS BUFFER GATES QUADRUPLE BUS BUFFER GATES

SN54AHCT126_03 数据手册

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SN54AHCT126, SN74AHCT126  
QUADRUPLE BUS BUFFER GATES  
WITH 3-STATE OUTPUTS  
SCLS265O – DECEMBER 1995 – REVISED JULY 2003  
SN54AHCT126 . . . J OR W PACKAGE  
SN74AHCT126 . . . D, DB, DGV, N, NS, OR PW PACKAGE  
(TOP VIEW)  
Inputs Are TTL-Voltage Compatible  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
1OE  
1A  
V
CC  
13 4OE  
1
2
3
4
5
6
7
14  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
12  
11  
10  
9
1Y  
4A  
2OE  
2A  
4Y  
description/ordering information  
3OE  
3A  
2Y  
The ’AHCT126 devices are quadruple bus buffer  
gates featuring independent line drivers with  
3-state outputs. Each output is disabled when the  
associated output-enable (OE) input is low. When  
OE is high, the respective gate passes the data  
from the A input to its Y output.  
8
GND  
3Y  
SN54AHCT126 . . . FK PACKAGE  
(TOP VIEW)  
To ensure the high-impedance state during power  
up or power down, OE should be tied to GND  
through a pulldown resistor; the minimum value of  
the resistor is determined by the current-sourcing  
capability of the driver.  
3
2
1 20 19  
18  
4A  
NC  
4Y  
1Y  
NC  
4
5
6
7
8
17  
16  
2OE  
NC  
15 NC  
14  
9 10 11 12 13  
3OE  
2A  
NC – No internal connection  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PDIP – N  
SOIC – D  
Tube  
SN74AHCT126N  
SN74AHCT126N  
Tube  
SN74AHCT126D  
AHCT126  
Tape and reel  
Tape and reel  
Tape and reel  
Tube  
SN74AHCT126DR  
SN74AHCT126NSR  
SN74AHCT126DBR  
SN74AHCT126PW  
SN74AHCT126PWR  
SN74AHCT126DGVR  
SNJ54AHCT126J  
SNJ54AHCT126W  
SNJ54AHCT126FK  
SOP – NS  
AHCT126  
HB126  
–40°C to 85°C  
SSOP – DB  
TSSOP – PW  
HB126  
Tape and reel  
Tape and reel  
Tube  
TVSOP – DGV  
CDIP – J  
HB126  
SNJ54AHCT126J  
SNJ54AHCT126W  
SNJ54AHCT126FK  
–55°C to 125°C  
CFP – W  
Tube  
LCCC – FK  
Tube  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines  
are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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