5秒后页面跳转
SN54AHC16540 PDF预览

SN54AHC16540

更新时间: 2024-11-15 23:06:07
品牌 Logo 应用领域
德州仪器 - TI 驱动器输出元件
页数 文件大小 规格书
7页 118K
描述
16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

SN54AHC16540 数据手册

 浏览型号SN54AHC16540的Datasheet PDF文件第2页浏览型号SN54AHC16540的Datasheet PDF文件第3页浏览型号SN54AHC16540的Datasheet PDF文件第4页浏览型号SN54AHC16540的Datasheet PDF文件第5页浏览型号SN54AHC16540的Datasheet PDF文件第6页浏览型号SN54AHC16540的Datasheet PDF文件第7页 
SN54AHC16540, SN74AHC16540  
16-BIT BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCLS331F – MARCH 1996 – REVISED JANUARY 2000  
SN54AHC16540 . . . WD PACKAGE  
SN74AHC16540 . . . DGG, DGV, OR DL PACKAGE  
(TOP VIEW)  
Members of the Texas Instruments  
Widebus Family  
EPIC (Enhanced-Performance Implanted  
CMOS) Process  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
1OE1  
1Y1  
1OE2  
1A1  
Operating Range 2-V to 5.5-V V  
CC  
2
3
1Y2  
1A2  
Distributed V  
High-Speed Switching Noise  
and GND Pins Minimize  
CC  
4
GND  
1Y3  
GND  
1A3  
5
Flow-Through Architecture Optimizes PCB  
Layout  
6
1Y4  
1A4  
7
V
V
CC  
CC  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
8
1Y5  
1Y6  
GND  
1Y7  
1Y8  
2Y1  
2Y2  
GND  
2Y3  
2Y4  
1A5  
1A6  
GND  
1A7  
1A8  
2A1  
2A2  
GND  
2A3  
2A4  
9
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
Package Options Include Plastic Shrink  
Small-Outline (DL), Thin Shrink  
Small-Outline (DGG), and Thin Very  
Small-Outline (DGV) Packages and 380-mil  
Fine-Pitch Ceramic Flat (WD) Package  
Using 25-mil Center-to-Center Spacings  
V
V
CC  
CC  
description  
2Y5  
2Y6  
GND  
2Y7  
2Y8  
2A5  
2A6  
GND  
2A7  
2A8  
These 16-bit buffers and bus drivers provide a  
high-performance bus interface for wide data  
paths.  
The 3-state control gate is a 2-input AND gate with  
active-low inputs so that if either output-enable  
(OE1 or OE2) input is high, all corresponding  
outputs are in the high-impedance state.  
2OE1  
2OE2  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
The SN54AHC16540 is characterized for operation over the full military temperature range of –55°C to 125°C.  
The SN74AHC16540 is characterized for operation from –40°C to 85°C.  
FUNCTION TABLE  
(each 8-bit buffer/driver)  
INPUTS  
OUTPUT  
Y
A
L
OE1  
L
OE2  
L
H
L
L
L
H
X
X
H
X
Z
Z
X
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC and Widebus are trademarks of Texas Instruments Incorporated.  
Copyright 2000, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

与SN54AHC16540相关器件

型号 品牌 获取价格 描述 数据表
SN54AHC16540_09 TI

获取价格

16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN54AHC16540WD TI

获取价格

16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN54AHC16541 TI

获取价格

16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN54AHC16541_09 TI

获取价格

16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN54AHC16541WD TI

获取价格

16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN54AHC165W TI

获取价格

AHC SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, COMPLEMENTARY OUTPUT, CDFP1
SN54AHC174 TI

获取价格

HEX D-TYPE FLIP-FLOPS WITH CLEAR
SN54AHC174_07 TI

获取价格

HEX D-TYPE FLIP-FLOPS WITH CLEAR
SN54AHC174FK TI

获取价格

HEX D-TYPE FLIP-FLOPS WITH CLEAR
SN54AHC174FKR TI

获取价格

AHC SERIES, HEX POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, CQCC20, CERAMIC, CC-20