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SN54ACT534FK PDF预览

SN54ACT534FK

更新时间： 2024-11-14 22:59:11
品牌 Logo 应用领域
德州仪器 - TI 触发器输出元件
页数 文件大小 规格书
6页 100K
描述
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

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中文翻译

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SN54ACT534FK 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：QLCC包装说明：QCCN, LCC20,.35SQ
针数：20Reach Compliance Code：not_compliant
HTS代码：8542.39.00.01风险等级：5.63
系列：ACTJESD-30 代码：S-CQCC-N20
长度：8.89 mm负载电容（CL）：50 pF
逻辑集成电路类型：BUS DRIVER最大频率@ Nom-Sup：85000000 Hz
最大I（ol）：0.024 A位数：8
功能数量：1端口数量：2
端子数量：20最高工作温度：125 °C
最低工作温度：-55 °C输出特性：3-STATE
输出极性：INVERTED封装主体材料：CERAMIC, METAL-SEALED COFIRED
封装代码：QCCN封装等效代码：LCC20,.35SQ
封装形状：SQUARE封装形式：CHIP CARRIER
峰值回流温度（摄氏度）：NOT SPECIFIED电源：5 V
传播延迟（tpd）：14 ns认证状态：Not Qualified
座面最大高度：2.03 mm子类别：FF/Latches
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：MILITARY
端子形式：NO LEAD端子节距：1.27 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
触发器类型：POSITIVE EDGE宽度：8.89 mm
Base Number Matches：1

SN54ACT534FK 数据手册

 浏览型号SN54ACT534FK的Datasheet PDF文件第2页浏览型号SN54ACT534FK的Datasheet PDF文件第3页浏览型号SN54ACT534FK的Datasheet PDF文件第4页浏览型号SN54ACT534FK的Datasheet PDF文件第5页浏览型号SN54ACT534FK的Datasheet PDF文件第6页 
SN54ACT534, SN74ACT534  
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS  
WITH 3-STATE OUTPUTS  
SCAS556B – NOVEMBER 1995 – REVISED JANUARY 2000  
SN54ACT534 . . . J OR W PACKAGE  
SN74ACT534 . . . DB, DW, N, OR PW PACKAGE  
(TOP VIEW)  
Inputs Are TTL-Voltage Compatible  
3-State Inverting Outputs Drive Bus Lines  
Directly  
Full Parallel Access for Loading  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
OE  
1Q  
1D  
2D  
2Q  
3Q  
3D  
4D  
4Q  
V
CC  
8Q  
8D  
7D  
7Q  
6Q  
6D  
5D  
5Q  
CLK  
EPIC (Enhanced-Performance Implanted  
CMOS) 1-µm Process  
Package Options Include Plastic  
Small-Outline (DW), Shrink Small-Outline  
(DB), and Thin Shrink Small-Outline (PW)  
Packages, Ceramic Chip Carriers (FK) and  
Flatpacks (W), and Standard Plastic (N) and  
Ceramic (J) DIPs  
GND  
description  
SN54ACT534 . . . FK PACKAGE  
(TOP VIEW)  
These octal edge-triggered D-type flip-flops  
feature 3-state outputs designed specifically for  
driving  
highly  
capacitive  
or  
relatively  
low-impedance loads. The devices are  
particularly suitable for implementing buffer  
registers, I/O ports, bidirectional bus drivers, and  
working registers.  
3
2
1 20 19  
18  
8D  
2D  
2Q  
3Q  
3D  
4D  
4
5
6
7
8
17 7D  
16  
7Q  
15  
On the positive transition of the clock (CLK) input,  
the Q outputs are set to the complements of the  
logic levels set up at the data (D) inputs.  
6Q  
14  
6D  
9 10 11 12 13  
A buffered output-enable (OE) input can be used  
to place the eight outputs in either a normal logic  
state (high or low logic levels) or the  
high-impedance state. In the high-impedance  
state, the outputs neither load nor drive the bus  
lines significantly. The high-impedance state and  
increased drive provide the capability to drive bus  
lines without need for interface or pullup  
components.  
OE does not affect internal operations of the flip-flops. Old data can be retained or new data can be entered  
while the outputs are in the high-impedance state.  
The SN54ACT534 is characterized for operation over the full military temperature range of –55°C to 125°C. The  
SN74ACT534 is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 2000, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
123456

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