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SN54AC32W PDF预览

SN54AC32W

更新时间: 2024-11-20 22:59:11
品牌 Logo 应用领域
德州仪器 - TI 栅极逻辑集成电路输入元件
页数 文件大小 规格书
5页 82K
描述
QUADRUPLE 2-INPUT POSITIVE-OR GATES

SN54AC32W 技术参数

生命周期:Obsolete零件包装代码:DFP
包装说明:DFP,针数:14
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.19Is Samacsys:N
系列:ACJESD-30 代码:R-GDFP-F14
长度:9.21 mm负载电容(CL):50 pF
逻辑集成电路类型:OR GATE功能数量:4
输入次数:2端子数量:14
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DFP
封装形状:RECTANGULAR封装形式:FLATPACK
传播延迟(tpd):8.5 ns认证状态:Not Qualified
座面最大高度:2.03 mm最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子形式:FLAT
端子节距:1.27 mm端子位置:DUAL
宽度:6.29 mmBase Number Matches:1

SN54AC32W 数据手册

 浏览型号SN54AC32W的Datasheet PDF文件第2页浏览型号SN54AC32W的Datasheet PDF文件第3页浏览型号SN54AC32W的Datasheet PDF文件第4页浏览型号SN54AC32W的Datasheet PDF文件第5页 
SN54AC32, SN74AC32  
QUADRUPLE 2-INPUT POSITIVE-OR GATES  
SCAS528B – AUGUST 1995 – REVISED SEPTEMBER 1996  
SN54AC32 . . . J OR W PACKAGE  
SN74AC32 . . . D, DB, N, OR PW PACKAGE  
(TOP VIEW)  
EPIC (Enhanced-Performance Implanted  
CMOS) 1-µm Process  
Package Options Include Plastic  
Small-Outline (D), Shrink Small-Outline  
(DB), and Thin Shrink Small-Outline (PW)  
Packages, Ceramic Chip Carriers (FK) and  
Flatpacks (W), and Standard Plastic (N) and  
Ceramic (J) DIPS  
1A  
1B  
1Y  
2A  
2B  
V
CC  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
4B  
4A  
4Y  
3B  
3A  
3Y  
2Y  
GND  
description  
8
The ’AC32 are quadruple 2-input positive-OR  
gates. The devices perform the Boolean function  
Y = A + B or Y = A B in positive logic.  
SN54AC32 . . . FK PACKAGE  
(TOP VIEW)  
The SN54AC32 is characterized for operation  
over the full military temperature range of 55°C  
to 125°C. The SN74AC32 is characterized for  
operation from 40°C to 85°C.  
3
2
1
20 19  
18  
1Y  
NC  
2A  
4
5
6
7
8
4A  
NC  
4Y  
NC  
3B  
17  
16  
15  
14  
FUNCTION TABLE  
(each gate)  
NC  
2B  
INPUTS  
OUTPUT  
Y
9 10 11 12 13  
A
B
X
H
L
H
X
L
H
H
L
NC – No internal connection  
logic symbol  
logic diagram, each gate (positive logic)  
1
1A  
2
A
Y
B
1  
3
6
1Y  
2Y  
3Y  
4Y  
1B  
4
2A  
5
2B  
9
3A  
10  
3B  
12  
4A  
13  
4B  
8
11  
This symbol is in accordance with ANSI/IEEE Std 91-1984 and  
IEC Publication 617-12.  
Pin numbers shown are for the D, DB, J, N, PW, and W packages.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 1996, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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