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SN54ABTH162460 PDF预览

SN54ABTH162460

更新时间: 2024-11-11 23:06:07
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德州仪器 - TI 输出元件
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10页 178K
描述
4-TO-1 MULTIPLEXED/DEMULTIPLEXED REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS

SN54ABTH162460 数据手册

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SN54ABTH162460, SN74ABTH162460  
4-TO-1 MULTIPLEXED/DEMULTIPLEXED REGISTERED TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCBS241E – FEBRUARY 1993 – REVISED MAY 1997  
SN54ABTH162460 . . . WD PACKAGE  
SN74ABTH162460 . . . DL PACKAGE  
(TOP VIEW)  
Members of the Texas Instruments  
Widebus Family  
B-Port Outputs Have Equivalent 25-Ω  
Series Resistors, So No External Resistors  
Are Required  
LEAB1  
LEAB2  
LEBA  
GND  
LEB1  
LEB2  
OEB1  
OEB2  
SEL0  
GND  
1B1  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
2
State-of-the-Art EPIC-ΙΙB BiCMOS Design  
Significantly Reduces Power Dissipation  
3
4
5
Latch-Up Performance Exceeds 500 mA Per  
JEDEC Standard JESD-17  
1B2  
6
V
V
7
CC  
CC  
Typical V  
(Output Ground Bounce) < 1 V  
OLP  
CLKBA  
1B3  
1B4  
2B1  
GND  
2B2  
2B3  
2B4  
3B1  
3B2  
3B3  
GND  
3B4  
4B1  
4B2  
8
at V  
= 5 V, T = 25°C  
CC  
A
OEB  
CLKAB  
GND  
1A  
2A  
CE_SEL0  
CE_SEL1  
3A  
4A  
GND  
CLKENAB  
CLKENB  
CLKENBA  
9
High-Impedance State During Power Up  
and Power Down  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
Distributed V  
Minimizes High-Speed Switching Noise  
and GND Pin Configuration  
CC  
Flow-Through Architecture Optimizes PCB  
Layout  
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
Package Options Include Plastic 300-mil  
Shrink Small-Outline (DL) Package and  
380-mil Fine-Pitch Ceramic Flat (WD)  
Package Using 25-mil Center-to-Center  
Spacings  
V
V
CC  
CC  
LEB3  
LEB4  
GND  
OEA  
LEAB3  
LEAB4  
4B3  
4B4  
GND  
SEL1  
OEB3  
OEB4  
description  
The ’ABTH162460 are 4-bit to 1-bit multiplexed  
registered transceivers used in applications  
where four separate data paths must be  
multiplexed onto or demultiplexed from a single  
data path. Typical applications include  
multiplexing and/or demultiplexing of address and  
data  
information  
in  
microprocessor  
or  
bus-interface applications. This device also is  
useful in memory-interleaving applications.  
Five 4-bit I/O ports (1A–4A, 1B1–4, 2B1–4, 3B1–4, and 4B1–4) are available for address and/or data transfer.  
The output-enable (OEB, OEB1–OEB4, and OEA) inputs control the bus-transceiver functions. These control  
signals also allow 4-bit or 16-bit control, depending on the OEB level.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus and EPIC-ΙΙB are trademarks of Texas Instruments Incorporated.  
Copyright 1997, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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