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SN54ABTE16246

更新时间： 2024-09-23 23:06:07
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德州仪器 - TI 总线收发器开关输出元件
页数 文件大小 规格书
10页 163K
描述
11-BIT INCIDENT-WAVE SWITCHING BUS TRANSCEIVERS WITH 3-STATE AND OPEN-COLLECTOR OUTPUTS

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SN54ABTE16246 数据手册

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SN54ABTE16246, SN74ABTE16246  
11-BIT INCIDENT-WAVE SWITCHING BUS TRANSCEIVERS  
WITH 3-STATE AND OPEN-COLLECTOR OUTPUTS  
SCBS227F – JULY 1993 – REVISED JUNE 1999  
SN54ABTE16246 . . . WD PACKAGE  
SN74ABTE16246 . . . DGG OR DL PACKAGE  
(TOP VIEW)  
Members of the Texas Instruments  
Widebus Family  
State-of-the-Art EPIC-ΙΙB BiCMOS Design  
Significantly Reduces Power Dissipation  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
11OE  
11DIR  
11B  
GND  
10B  
V
11A  
10DIR  
GND  
10A  
9A  
V
9DIR  
8A  
GND  
7A  
7BI  
6A  
5A  
GND  
5BI  
4A  
V
3A  
3BI  
GND  
2A  
BIAS  
CC  
Support the VME64 ETL Specification  
2
3
Reduced TTL-Compatible Input Threshold  
Range  
4
5
High-Drive Outputs (I  
= –60 mA  
OH  
6
9B  
I
= 90 mA) Support Equivalent 25-Ω  
OL  
7
V
Incident-Wave Switching  
CC  
CC  
8
8BI  
8BO  
GND  
7BO  
6BI  
6BO  
5BO  
GND  
4BO  
4BI  
V
BIAS Pin Minimizes Signal Distortion  
CC  
9
During Live Insertion  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
Internal Pullup Resistor on OE Keeps  
Outputs in High-Impedance State During  
Power Up or Power Down  
Distributed V  
Minimizes High-Speed Switching Noise  
and GND Pin Configuration  
CC  
Equivalent 25-Ω Series Damping Resistor  
on B Port  
V
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
CC  
CC  
3BO  
2BI  
GND  
2BO  
1BO  
1BI  
Package Options Include Plastic Shrink  
Small-Outline (DL) and Thin-Shrink  
Small-Outline (DGG) Packages and 380-mil  
Fine-Pitch Ceramic Flat (WD) Package  
Using 25-mil Center-to-Center Spacings  
1A  
OE  
description  
The ’ABTE16246 devices are 11-bit noninverting transceivers designed for asynchronous two-way  
communication between buses. These devices have open-collector and 3-state outputs. They allow data  
transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the  
direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses  
are effectively isolated. When OE is low, the device is active.  
The B port has an equivalent 25-Ω series output resistor to reduce ringing. Active bus-hold inputs on the B port  
hold unused or floating inputs at a valid logic level.  
The A port provides for the precharging of the outputs via V BIAS, which establishes a voltage between 1.3 V  
CC  
and 1.7 V when V  
is not connected.  
CC  
The SN54ABTE16246 is characterized for operation over the full military temperature range of –55°C to 125°C.  
The SN74ABTE16246 is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus and EPICΙΙ-B are trademarks of Texas Instruments Incorporated.  
Copyright 1999, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...10

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