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SN54ABT240 PDF预览

SN54ABT240

更新时间: 2024-11-13 23:06:07
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德州仪器 - TI 驱动器输出元件
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7页 109K
描述
OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

SN54ABT240 数据手册

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SN54ABT240, SN74ABT240A  
OCTAL BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCBS098H – JANUARY 1991 – REVISED JANUARY 1997  
SN54ABT240 . . . J OR W PACKAGE  
SN74ABT240A . . . DB, DW, N, OR PW PACKAGE  
(TOP VIEW)  
State-of-the-Art EPIC-ΙΙB BiCMOS Design  
Significantly Reduces Power Dissipation  
Latch-Up Performance Exceeds 500 mA Per  
JEDEC Standard JESD-17  
1OE  
1A1  
2Y4  
1A2  
2Y3  
1A3  
2Y2  
1A4  
2Y1  
GND  
V
CC  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
2OE  
1Y1  
2A4  
1Y2  
2A3  
1Y3  
Typical V  
(Output Ground Bounce) < 1 V  
OLP  
at V  
= 5 V, T = 25°C  
CC  
A
High-Drive Outputs (–32-mA I , 64-mA I  
OH  
)
OL  
13 2A2  
12 1Y4  
Package Options Include Plastic  
Small-Outline (DW), Shrink Small-Outline  
(DB), and Thin Shrink Small-Outline (PW)  
Packages, Ceramic Chip Carriers (FK),  
Plastic (N) and Ceramic (J) DIPs, and  
Ceramic Flat (W) Package  
11  
2A1  
SN54ABT240 . . . FK PACKAGE  
(TOP VIEW)  
description  
These octal buffers and line drivers are designed  
specifically to improve both the performance and  
density of 3-state memory address drivers, clock  
drivers, and bus-oriented receivers and  
transmitters. Together with the SN54ABT241,  
3
2
1
20 19  
18  
1Y1  
2A4  
1Y2  
2A3  
1Y3  
1A2  
2Y3  
1A3  
2Y2  
1A4  
4
5
6
7
8
17  
16  
15  
14  
SN74ABT241A,  
SN54ABT244,  
and  
9 10 11 12 13  
SN74ABT244A, these devices provide the choice  
of selected combinations of inverting and  
noninverting outputs, symmetrical active-low  
output-enable (OE) inputs, and complementary  
OE and OE inputs.  
The SN54ABT240 and SN74ABT240A are organized as two 4-bit buffers/line drivers with separate OE inputs.  
When OE is low, the devices pass inverted data from the A inputs to the Y outputs. When OE is high, the outputs  
are in the high-impedance state.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
The SN54ABT240 is characterized for operation over the full military temperature range of –55°C to 125°C. The  
SN74ABT240A is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.  
Copyright 1997, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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