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SN54ABT126J PDF预览

SN54ABT126J

更新时间： 2024-11-12 22:34:31
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德州仪器 - TI 输出元件
页数 文件大小 规格书
14页 452K
描述
QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS

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SN54ABT126J 数据手册

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SN54ABT126, SN74ABT126  
QUADRUPLE BUS BUFFER GATES  
WITH 3-STATE OUTPUTS  
SCBS183H – FEBRUARY 1991 – REVISED MAY 2003  
Typical V  
(Output Ground Bounce)  
I
and Power-Up 3-State Support Hot  
OLP  
off  
<1 V at V  
= 5 V, T = 25°C  
Insertion  
CC  
A
High-Impedance State During Power Up  
and Power Down  
Latch-Up Performance Exceeds 500 mA Per  
JESD 17  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
High-Drive Outputs (–32-mA I , 64-mA I  
)
OH  
OL  
SN54ABT126 . . . FK PACKAGE  
SN54ABT126 . . . J PACKAGE  
SN74ABT126 . . . D, DB, N, NS,  
OR PW PACKAGE  
SN74ABT126 . . . RGY PACKAGE  
(TOP VIEW)  
(TOP VIEW)  
(TOP VIEW)  
1
14  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
1OE  
1A  
1Y  
2OE  
2A  
2Y  
V
CC  
4OE  
3
2
1
20 19  
18 4A  
1Y  
NC  
4
5
6
7
8
1A  
1Y  
13 4OE  
12 4A  
2
3
4
5
6
17  
16  
15  
14  
NC  
4Y  
4A  
4Y  
3OE  
3A  
3Y  
2OE  
NC  
11  
10  
9
2OE  
2A  
4Y  
NC  
3OE  
3OE  
3A  
2A  
2Y  
9 10 11 12 13  
7
8
8
GND  
NC – No internal connection  
description/ordering information  
The ’ABT126 bus buffer gates feature independent line drivers with 3-state outputs. Each output is disabled  
when the associated output-enable (OE) input is low.  
When V  
is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down.  
CC  
However, to ensure the high-impedance state above 2.1 V, OE should be tied to GND through a pulldown  
resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
PACKAGE  
T
A
QFN – RGY  
PDIP – N  
Tape and reel  
Tube  
SN74ABT126RGYR  
SN74ABT126N  
AB126  
SN74ABT126N  
Tube  
SN74ABT126D  
SOIC – D  
ABT126  
Tape and reel  
Tape and reel  
Tape and reel  
Tube  
SN74ABT126DR  
SN74ABT126NSR  
SN74ABT126DBR  
SN74ABT126PW  
SN74ABT126PWR  
SNJ54ABT126J  
SNJ54ABT126FK  
–40°C to 85°C  
–55°C to 125°C  
SOP – NS  
ABT126  
AB126  
SSOP – DB  
TSSOP – PW  
AB126  
Tape and reel  
Tube  
CDIP – J  
SNJ54ABT126J  
LCCC – FK  
Tube  
SNJ54ABT126FK  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...14

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