MUN2211T1, SMUN2211T1,
NSVMUN2211T1 Series
Bias Resistor Transistors
NPN Silicon Surface Mount Transistors
with Monolithic Bias Resistor Network
http://onsemi.com
This new series of digital transistors is designed to replace a single
device and its external resistor bias network. The BRT (Bias Resistor
Transistor) contains a single transistor with a monolithic bias network
consisting of two resistors; a series base resistor and a base−emitter
resistor. The BRT eliminates these individual components by
integrating them into a single device. The use of a BRT can reduce
both system cost and board space. The device is housed in the
SC−59 package which is designed for low power surface
mount applications.
NPN SILICON
BIAS RESISTOR
TRANSISTORS
Features
SC−59
CASE 318D
STYLE 1
• Simplifies Circuit Design
• Reduces Board Space
• Reduces Component Count
PIN 3
COLLECTOR
(OUTPUT)
• Moisture Sensitivity Level: 1
PIN 2
BASE
(INPUT)
R
R
1
• ESD Rating − Human Body Model: Class 1
− Machine Model: Class B
2
PIN 1
EMITTER
(GROUND)
• The SC−59 Package can be Soldered Using Wave or Reflow
• The Modified Gull−Winged Leads Absorb Thermal Stress During
Soldering Eliminating the Possibility of Damage to the Die
• AEC−Q101 Qualified and PPAP Capable
MARKING DIAGRAM
• S and NSV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements
• Pb−Free Packages are Available*
8x M G
G
1
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
A
8x = Device Code (Refer to page 2)
Rating
Collector-Base Voltage
Collector-Emitter Voltage
Collector Current
Symbol
Value
50
Unit
Vdc
M
= Date Code*
V
CBO
CEO
G
= Pb−Free Package
V
50
Vdc
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
I
C
100
mAdc
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
ORDERING INFORMATION
See detailed ordering and shipping information in the table on
page 2 of this data sheet.
DEVICE MARKING INFORMATION
See specific marking information in the Device Marking and
Resistor Values table on page 2 of this data sheet.
Preferred devices are recommended choices for future use
and best overall value.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2012
1
Publication Order Number:
January, 2012 − Rev. 15
MUN2211T1/D