SMJ320C50/SMQ320C50
DIGITAL SIGNAL PROCESSOR
SGUS020 – JUNE 1996
HFG PACKAGE
(TOP VIEW)
Military Operating Temperature Range:
– 55°C to 125°C
Processed to MIL-PRF-38535
Fast Instruction Cycle Time (30 ns and
40 ns)
1
99
Source-Code Compatible With All ’C1x
and ’C2x Devices
RAM-Based Operation
– 9K × 16-Bit Single-Cycle On-Chip
Program/Data RAM
– 1056 × 16-Bit Dual-Access On-Chip
Data RAM
33
67
2K × 16-Bit On-Chip Boot ROM
224K × 16-Bit Maximum Addressable
External Memory Space (64K Program,
64K Data, 64K I/O, and 32K Global)
GFA PACKAGE
(TOP VIEW)
32-Bit Arithmetic Logic Unit (ALU)
– 32-bit Accumulator (ACC)
– 32-Bit Accumulator Buffer (ACCB)
A
C
B
D
F
E
G
J
16-Bit Parallel Logic Unit (PLU)
16 × 16-Bit Multiplier, 32-Bit Product
11 Context-Switch Registers
H
K
L
M
P
T
Two Buffers for Circular Addressing
Full-Duplex Synchronous Serial Port
Time-Division Multiplexed Serial Port (TDM)
Timer With Control and Counter Registers
N
R
U
W
V
2
4
6
8 10 12 14 16 18
11 13 15 17 19
1
3
5
7
9
16 Software Programmable Wait-State
Generators
PQ PACKAGE
(TOP VIEW)
Divide-by-One Clock Option
†
1 132
117
17
IEEE 1149.1 Boundary Scan Logic
Operations Are Fully Static
18
116
Enhanced Performance Implanted CMOS
(EPIC ) 0.72-µm Technology Fabricated by
Texas Instruments
Packaging
– 141-Pin Ceramic Grid Array (GFA Suffix)
– 132-Lead Ceramic Quad Flat Package
(HFG Suffix)
– 132-Lead Plastic Quad Flat Package
(PQ Suffix)
84
50
51
83
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
†
IEEE Standard 1149.1-1990 Standard-Test-Access Port and Boundary Scan Architecture
EPIC and TI are trademarks of Texas Instruments Incorporated.
Copyright 1996, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
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