Datasheet > SMFR-29C516E-31SB

SMFR-29C516E-31SB

更新时间： 2024-01-28 22:38:03

品牌	Logo	应用领域
美国微芯 - MICROCHIP		ATM 异步传输模式逻辑集成电路
页数	文件大小	规格书
16页	94K
描述
Error Detection And Correction Circuit, CMOS Series, 16-Bit, True Output, CMOS, PQFP100

阅读下载

中文翻译

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

SMFR-29C516E-31SB 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
包装说明：	QFP, QFP100,.7X.9	Reach Compliance Code：	not_compliant
HTS代码：	8542.39.00.01	风险等级：	5.39
系列：	CMOS	JESD-30 代码：	R-PQFP-G100
JESD-609代码：	e0	长度：	20 mm
逻辑集成电路类型：	ERROR DETECTION AND CORRECTION CIRCUIT	湿度敏感等级：	3
位数：	16	功能数量：	1
端子数量：	100	最高工作温度：	125 °C
最低工作温度：	-55 °C	输出极性：	TRUE
封装主体材料：	PLASTIC/EPOXY	封装代码：	QFP
封装等效代码：	QFP100,.7X.9	封装形状：	RECTANGULAR
封装形式：	FLATPACK	峰值回流温度（摄氏度）：	225
电源：	5 V	传播延迟（tpd）：	31 ns
认证状态：	Not Qualified	筛选级别：	ESA/SCC-9000B
座面最大高度：	3.81 mm	子类别：	Arithmetic Circuits
最大供电电压 (Vsup)：	5.5 V	最小供电电压 (Vsup)：	4.5 V
标称供电电压 (Vsup)：	5 V	表面贴装：	YES
技术：	CMOS	温度等级：	MILITARY
端子面层：	TIN LEAD	端子形式：	GULL WING
端子节距：	0.65 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	30	宽度：	14 mm
Base Number Matches：	1

SMFR-29C516E-31SB 数据手册

浏览型号SMFR-29C516E-31SB的Datasheet PDF文件第2页

浏览型号SMFR-29C516E-31SB的Datasheet PDF文件第3页

浏览型号SMFR-29C516E-31SB的Datasheet PDF文件第4页

浏览型号SMFR-29C516E-31SB的Datasheet PDF文件第5页

浏览型号SMFR-29C516E-31SB的Datasheet PDF文件第6页

29C516E

16–Bit Flow–Through EDAC

Error Detection And Correction unit

1. Introduction

The 29C516E Atmel EDAC is a very low power

the corrupted data is placed on the output port and the

flow–through 16–bit Error Detection And Correction unit Uncorrectable Error Flag is set. Note that when there is

(EDAC) with two user data buses. The EDAC is used in more than two errors, then some bit patterns may appear

a high integrity system for monitoring and correction of as possible correctable errors. Therefore, if the

data values coming from the memory space. During a environment produces this type of error, the EDAC must

processor write cycle, at each memory location (16–bit be used in detect and provide no automatic correction.

width), EDAC calculated checkword (6 or 8–bit width) is Data and syndrome analysis must be done.

added. When performing a read operation from memory,

the 29C516E verifies the entire checkword and data

The 29C516E acts as a data buffer for µP–memory

interfacing. A flow–through EDAC is placed in the data

combination. It detects and can correct 100% of all the

bus path, between the processor and the memory to be

single–bit errors and it detects all double–bit errors.

protected. This component is able to serve two different

When the 29C516E uses 6–checkbit, it can detect any

users of one memory space. So, it forms the interface

error on any single 4–bit memory chip. The 8–check–bit

between the 22/24–bit (16+6/16+8) memory data bus and

option gives the additional capability to detect all errors

the two 16–bit processor data busses with a high drive

on any single 8–bit memory chip. All the errors are

capability (–12.8 mA). The two data ports can be used to

signaled to the master system (via 2 error Flags) in order

create a dual port bus in front of memory space. The

User–1(2) can transfer data from/to the memory or

to allow the processor to make the required action.

The 29C516E operates in two possible modes: corrected

or detected mode. In the corrected mode, the single–bit in

error is complemented (corrected). Then, the available

entire data is placed on the output port and the Correctable

Error Flag is set. In case of double–bit errors (or more),

from/to the User–2(1), by–passing the memory. During

read or write memory cycles processed by the User–1(2),

the User–2(1) have the possibility to listen the

transferred data.

2. Features

D Very Low Power CMOS

D Correctable and Uncorrectable Error Flags

D Two User Data Buses

D 16–Bit operation with 6 or 8 Check Bits

D Fast Error Detection : 31 ns (max.)

D Fast Error Correction : 32 ns (max.)

D Corrects all Single–Bit Errors

D User to User Transfer and Listening operation

D High Drive Capability on Buses : –12.8 mA

D TTL Compatible

D Detects all Double–Bit Errors

D Single 5V ±10% Power Supply

D 100 Pin Multilayer Quad Flat Pack

(Flat leaded or L leaded).

D Detects some Multi–Bit Errors

D Detects Chip Errors (x1, x4 & x8 RAM Format)

Atmel Corporation

Rev. D (09 Dec. 97)

12 3 4 5 6 7...16

中文翻译

下载PDF

与SMFR-29C516E-31SB相关器件

型号	品牌	获取价格	描述	数据表
SMFR-29C516E-31SC	MICROCHIP	获取价格	Error Detection And Correction Circuit, CMOS Series, 16-Bit, True Output, CMOS, PQFP100
SMFR-29C516ESB	TEMIC	获取价格	Error Detection And Correction Circuit, 16-Bit, CMOS, MQFP-100
SMFR-29C516ESB	ATMEL	获取价格	Error Detection And Correction Circuit, 16-Bit, CMOS, MQFP-100
SMFR-29C516ESC	ATMEL	获取价格	Error Detection And Correction Circuit, 16-Bit, CMOS, PQFP100, MQFP-100
SMF-S-105DBH1-B	SANYOU	获取价格	Miniature Power Relay
SMF-S-105DBH1-F	SANYOU	获取价格	Miniature Power Relay
SMF-S-105DBV1-B	SANYOU	获取价格	Miniature Power Relay
SMF-S-105DBV1-F	SANYOU	获取价格	Miniature Power Relay
SMF-S-105DMH1-B	SANYOU	获取价格	Miniature Power Relay
SMF-S-105DMH1-F	SANYOU	获取价格	Miniature Power Relay

产品中心

服务支持

精选活动

关于我们

帮助中心

SMFR-29C516E-31SB

SMFR-29C516E-31SB 技术参数

SMFR-29C516E-31SB 数据手册

与SMFR-29C516E-31SB相关器件

与SMFR-29C516E-31SB相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

SMFR-29C516E-31SB

SMFR-29C516E-31SB 技术参数

SMFR-29C516E-31SB 数据手册

与SMFR-29C516E-31SB相关器件

与SMFR-29C516E-31SB相关文章

您还可以找

您在本页遇到什么问题？