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SM39R2051W20 PDF预览

SM39R2051W20

更新时间: 2024-11-14 12:25:03
品牌 Logo 应用领域
新茂 - SYNCMOS 微控制器
页数 文件大小 规格书
47页 612K
描述
SM39R4051/SM39R2051 8-Bit Micro-controller 4KB/2KB with ISP Flash & 256B RAM embedded

SM39R2051W20 数据手册

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SM39R4051/SM39R2051  
8-Bit Micro-controller  
4KB/2KB with ISP Flash  
& 256B RAM embedded  
FOSVOS TEL: 021-58998693  
Description..........................................................................................................................................................................3  
Features..............................................................................................................................................................................3  
Pin Configuration ................................................................................................................................................................4  
Block Diagram.....................................................................................................................................................................5  
Pin Description....................................................................................................................................................................6  
Special Function Register (SFR) ........................................................................................................................................7  
Function Description...........................................................................................................................................................9  
1.  
General Features .......................................................................................................................................................9  
1.1.  
1.2.  
1.3.  
1.4.  
Embedded Flash...........................................................................................................................................9  
IO Pads .........................................................................................................................................................9  
Instruction timing Selection...........................................................................................................................9  
RESET ........................................................................................................................................................10  
1.4.1.  
Hardware RESET function.............................................................................................................10  
Software RESET function ..............................................................................................................10  
Time Access Key register (TAKEY)................................................................................................10  
Software Reset register (SWRES).................................................................................................11  
Example of software reset .............................................................................................................11  
1.4.2.  
1.4.3.  
1.4.4.  
1.4.5.  
1.5.  
Clocks .........................................................................................................................................................11  
2.  
3.  
Instruction Set ..........................................................................................................................................................12  
Memory Structure.....................................................................................................................................................16  
3.1.  
3.2.  
Program Memory ........................................................................................................................................16  
Data Memory...............................................................................................................................................17  
3.2.1.  
3.2.2.  
Data memory - lower 128 byte (00h to 7Fh)..................................................................................18  
Data memory - higher 128 byte (80h to FFh) ................................................................................18  
4.  
CPU Engine .............................................................................................................................................................19  
4.1.  
4.2.  
4.3.  
4.4.  
4.5.  
4.6.  
4.7.  
Accumulator ................................................................................................................................................19  
B Register ...................................................................................................................................................19  
Program Status Word..................................................................................................................................20  
Stack Pointer...............................................................................................................................................20  
Data Pointer ................................................................................................................................................20  
Data Pointer 1 .............................................................................................................................................21  
Interface control register .............................................................................................................................21  
5.  
6.  
GPIO ........................................................................................................................................................................22  
Timer 0 and Timer 1.................................................................................................................................................24  
6.1.  
6.2.  
6.3.  
Timer/counter mode control register (TMOD).............................................................................................24  
Timer/counter control register (TCON) .......................................................................................................25  
T0T1 signal swapping..........................................................................................................................25  
7.  
Serial interface 0 ......................................................................................................................................................26  
7.1.  
7.2.  
7.3.  
7.4.  
7.5.  
7.6.  
Mode 0 ........................................................................................................................................................27  
Mode 1 ........................................................................................................................................................27  
Mode 2 ........................................................................................................................................................28  
Mode 3 ........................................................................................................................................................28  
Multiprocessor communication of Serial Interface 0...................................................................................28  
Baud rate generator....................................................................................................................................29  
7.6.1.  
7.6.2.  
Serial interface 0 modes 1 and 3 ...................................................................................................29  
Clock source for baud rate.............................................................................................................29  
8.  
9.  
Watchdog timer ........................................................................................................................................................30  
Interrupt....................................................................................................................................................................33  
9.1.  
Priority level structure..................................................................................................................................35  
Power Management Unit.................................................................................................................................36  
Idle mode................................................................................................................................................36  
Stop mode...............................................................................................................................................36  
IIC function ......................................................................................................................................................37  
LVI – Low Voltage Interrupt .............................................................................................................................41  
In-System Programming (Internal ISP) ...........................................................................................................42  
ISP service program ...............................................................................................................................42  
Lock Bit (N).............................................................................................................................................42  
10.  
10.1.  
10.2.  
11.  
12.  
13.  
13.1.  
13.2.  
Specifications subject to change without notice contact your sales representatives for the most recent information.  
ISSFD-M055 Ver.E SM39R4051 09/2011  
1

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