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SM16M72ALDT-7.5 PDF预览

SM16M72ALDT-7.5

更新时间: 2024-02-10 09:23:05
品牌 Logo 应用领域
铁电 - RAMTRON 动态存储器内存集成电路
页数 文件大小 规格书
15页 197K
描述
Synchronous DRAM Module, 16MX72, 4.5ns, CMOS, DIMM-168

SM16M72ALDT-7.5 技术参数

生命周期:Obsolete零件包装代码:DIMM
包装说明:,针数:168
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.36风险等级:5.84
访问模式:DUAL BANK PAGE BURST最长访问时间:4.5 ns
其他特性:AUTO/SELF REFRESHJESD-30 代码:R-XDMA-N168
内存密度:1207959552 bit内存集成电路类型:SYNCHRONOUS DRAM MODULE
内存宽度:72功能数量:1
端口数量:1端子数量:168
字数:16777216 words字数代码:16000000
工作模式:SYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:16MX72
封装主体材料:UNSPECIFIED封装形状:RECTANGULAR
封装形式:MICROELECTRONIC ASSEMBLY认证状态:Not Qualified
自我刷新:YES最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:NO技术:CMOS
温度等级:COMMERCIAL端子形式:NO LEAD
端子位置:DUALBase Number Matches:1

SM16M72ALDT-7.5 数据手册

 浏览型号SM16M72ALDT-7.5的Datasheet PDF文件第2页浏览型号SM16M72ALDT-7.5的Datasheet PDF文件第3页浏览型号SM16M72ALDT-7.5的Datasheet PDF文件第4页浏览型号SM16M72ALDT-7.5的Datasheet PDF文件第5页浏览型号SM16M72ALDT-7.5的Datasheet PDF文件第6页浏览型号SM16M72ALDT-7.5的Datasheet PDF文件第7页 
168-pin Low Profile ESDRAM DIMMs  
32MB, 64MB, 128MB  
Preliminary Data Sheet  
Features  
Pin  
Symbol  
Pin  
Symbol  
Pin  
Symbol  
Pin  
Symbol  
JEDEC Standard 168-pin SDRAM DIMM  
Low Latency 166 MHz Modules (2:2:2)  
1
Vss  
DQ0  
DQ1  
DQ2  
DQ3  
Vdd  
43  
44  
45  
46  
47  
48  
49  
50  
51  
52  
53  
54  
55  
56  
57  
58  
59  
60  
61  
62  
63  
64  
65  
66  
67  
68  
69  
70  
71  
72  
73  
74  
75  
76  
77  
78  
79  
80  
81  
82  
83  
84  
Vss  
DNU  
S2#  
85  
86  
Vss  
DQ32  
DQ33  
DQ34  
DQ35  
Vdd  
127  
128  
129  
130  
131  
132  
133  
134  
135  
136  
137  
138  
139  
140  
141  
142  
143  
144  
145  
146  
147  
148  
149  
150  
151  
152  
153  
154  
155  
156  
157  
158  
159  
160  
161  
162  
163  
164  
165  
166  
167  
168  
Vss  
CKE0  
S3#  
2
CAS Latency = 2  
RAS to CAS Delay = 2  
Precharge Delay = 2  
3
87  
4
DQMB2  
DQMB3  
DNU  
Vdd  
88  
DQMB6  
DQMB7  
RFU  
Vdd  
5
89  
Sustained Random Burst Reads (same bank access)  
6
90  
1-1-1-1 at 66MHz (CL = 1)  
2-1-1-1 at 166MHz (CL = 2)  
7
DQ4  
DQ5  
DQ6  
DQ7  
DQ8  
Vss  
91  
DQ36  
DQ37  
DQ38  
DQ39  
DQ40  
Vss  
Early Auto-Precharge and Pipelined Row Activation  
Hidden Auto-Refresh (4K, 64ms)  
Fully Synchronous Operation  
On-board Serial Presence Detect (SPD)  
Unbuffered 168-pin DIMM  
8
NC  
92  
NC  
9
NC  
93  
NC  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
35  
36  
37  
38  
39  
40  
41  
42  
CB2  
94  
CB6  
CB3  
95  
CB7  
Vss  
96  
Vss  
Single 3.3V ± 0.3V Power Supply  
Low Profile for IU Rack Mount Systems  
DQ9  
DQ10  
DQ11  
DQ12  
DQ13  
Vdd  
DQ16  
DQ17  
DQ18  
DQ19  
Vdd  
97  
DQ41  
DQ42  
DQ43  
DQ44  
DQ45  
Vdd  
DQ48  
DQ49  
DQ50  
DQ51  
Vdd  
98  
99  
Description  
100  
101  
102  
103  
104  
105  
106  
107  
108  
109  
110  
111  
112  
113  
114  
115  
116  
117  
118  
119  
120  
121  
122  
123  
124  
125  
126  
The Enhanced SDRAM (ESDRAM) DIMMs are low  
latency, high performance memory modules of 32, 64, and  
128 MByte capacities, and are organized x64 or x72 bits  
wide. These DIMMs are 100% pin, function, and timing  
compatible with JEDEC standard 168-pin SDRAM DIMMs.  
The 32 MByte and 64 MByte DIMMs employ a single  
physical bank of memory while the 128 MByte DIMMs are  
built as two physical banks. Within each physical bank of  
memory are four logical banks, which are accessed through  
the use of BA0 and BA1 (pins 122 and 39). All control,  
access, and data input signals are registered into each of the  
ESDRAM components through use of an external clock,  
CK0-CK3.  
DQ20  
NC  
DQ52  
NC  
DQ14  
DQ15  
CB0  
CB1  
Vss  
DQ46  
DQ47  
CB4  
NC  
NC  
CKE1  
Vss  
NC  
CB5  
Vss  
DQ21  
DQ22  
DQ23  
Vss  
Vss  
DQ53  
DQ54  
DQ55  
Vss  
NC  
NC  
NC  
NC  
Vdd  
Vdd  
WE#  
DQMB0  
DQMB1  
S0#  
DQ24  
DQ25  
DQ26  
DQ27  
Vdd  
CAS#  
DQMB4  
DQMB5  
S1#  
DQ56  
DQ57  
DQ58  
DQ59  
Vdd  
ESDRAM DIMMs provide pipeline burst SRAM  
performance up to 66 MHz and nearly the same at bus  
speeds up to 166 MHz. This performance is achieved using  
JEDEC superset features including early auto-precharge and  
pipelined row activation. The ESDRAM also supports  
hidden auto-refresh.  
DNU  
Vss  
RAS#  
Vss  
DQ28  
DQ29  
DQ30  
DQ31  
Vss  
DQ60  
DQ61  
DQ62  
DQ63  
Vss  
A0  
A1  
All ESDRAM DIMMs operate from a 3.3V power supply,  
and all inputs and outputs are LVTTL compatible. The  
DIMM has a low 1.15-inch height to support IU rack mount  
system requirements. See the ESDRAM component data  
sheet for  
specifications and functional operation.  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
CK2  
A9  
CK3  
a more detailed discussion of ESDRAM  
A10/AP  
BA1  
Vdd  
NC  
BA0  
NC  
WP  
A11  
SA0  
SDA  
SCL  
Vdd  
SA1  
Vdd  
CK1  
SA2  
CK0  
Vdd  
RFU  
Vdd  
Enhanced Memory Systems Inc., 1850 Ramtron Dr., Colo Spgs, CO 80921  
PHONE: (800) 545-DRAM; FAX: (719) 488-9095; http://www.edram.com  
2001 Enhanced Memory Systems. All rights reserved.  
The information contained herein is subject to change without notice.  
Revision 1.0  
Page 1 of 15  

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