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SLP_F12N65SV PDF预览

SLP_F12N65SV

更新时间: 2024-11-18 18:09:35
品牌 Logo 应用领域
美浦森 - Maplesemi /
页数 文件大小 规格书
9页 921K
描述
TO-220C&TO-220F

SLP_F12N65SV 数据手册

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SLP12N65SV / SLF12N65SV  
650V N-Channel MOSFET  
General Description  
Features  
This Power MOSFET is produced using Msemitek‘s  
advanced planar stripe DMOS technology.  
- 12A, 650V, RDS(on)Type=0.64Ω@VGS = 10 V  
- Low gate charge ( typical 45nC)  
- High ruggedness  
- Fast switching  
- 100% avalanche tested  
- Improved dv/dt capability  
This advanced technology has been especially tailored  
to minimize on-state resistance, provide superior switching  
performance, and withstand high energy pulse in the  
avalanche and commutation mode. These devices are well  
suited for high efficiency switched mode power supplies,  
active power factor correction based on half bridge topology.  
Absolute Maximum Ratings TC = 25unless otherwise noted  
Symbol  
Parameter  
SLP12N65SV  
SLF12N65SV  
Units  
Drain-Source Voltage  
650  
V
VDSS  
Drain Current  
- Continuous (TC = 25)  
- Continuous (TC = 100)  
- Pulsed  
12  
6
A
A
ID  
(Note 1)  
IDM  
VGSS  
EAS  
IAR  
Drain Current  
40  
A
Gate-Source Voltage  
±30  
550  
12  
V
(Note 2)  
(Note 1)  
(Note 1)  
(Note 3)  
Single Pulsed Avalanche Energy  
Avalanche Current  
mJ  
A
EAR  
Repetitive Avalanche Energy  
Peak Diode Recovery dv/dt  
Power Dissipation (TC = 25)  
36  
mJ  
V/ns  
W
dv/dt  
2.1  
-
-
41.7  
0.33  
PD  
- Derate above 25℃  
W/℃  
TJ, TSTG  
Operating and Storage Temperature Range  
-55 to +150  
300  
Maximum lead temperature for soldering purposes,  
TL  
1/8" from case for 5 seconds  
Thermal Characteristics  
Max  
Symbol  
Parameter  
Units  
SLP12N65SV  
SLF12N65SV  
Thermal Resistance, Junction-to-Case  
Thermal Resistance, Junction-to-Ambient  
-
3.0  
/W  
/W  
RθJC  
RθJA  
62.5  
62.5  
Msemitek Co., Ltd  
http://www.msemitek.com  
Rev.1.0 Jan. 2021  

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