Datasheet > SLG59M1707V

SLG59M1707V

更新时间： 2023-12-20 18:46:27

品牌	Logo	应用领域
瑞萨 - RENESAS		/
页数	文件大小	规格书
28页	1331K
描述
GreenFET Single N-Channel Load Switch

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SLG59M1707V 数据手册

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SLG59M1707V

A 125 °C Rated, 4 mm , 13 mΩ, 3.5 A Load Switch with Protection

Features and an Analog Current Monitor Output

General Description

Pin Configuration

Operating from a 2.5 V to 5.5 V power supply and fully

specified over the -40 °C to 125 °C extended industrial

temperature range, the SLG59M1707V is a high-performance

13 mΩ, 3.5 A single-channel nFET load switch designed for all

0.8 V to 5.5 V power rail applications. With a fixed V_OUTslew

rate of 3 V/ms, inrush current is internally limited. Using a

proprietary MOSFET design, the SLG59M1707V achieves a

stable 13 mΩ RDS_ONacross a wide input/supply voltage

ON GND

RSET

IOUT

VDD

FAULT

VIN

16 15

VOUT

VIN

range.

The

SLG59M1707V

also

incorporates

resistor-adjustable current limiting as well as thermal

protection. Using Renesas’s proprietary CuFET™ technology

for high-current operation, the SLG59M1707V is packaged in

a space-efficient, low thermal resistance, RoHS-compliant 1.6

mm x 2.5 mm STQFN package.

VIN

VIN VOUT

16-pin FC-STQFN

Features

(Top View)

•

Low RDS_ONnFET Block: 13 mΩ

Steady-state Operating Current: Up to 3.5 A

Supply Voltage: 2.5 V ≤ V_DD≤ 5.5 V

Wide Input Voltage Range: 0.8 V ≤ V_IN≤ V_DD

Fixed V_OUTSlew Rate: 3 V/ms

Applications

•

Notebook Power Rail Switching

Tablet Power Rail Switching

Smartphone Power Rail Switching

Two-stage Overcurrent Protection:

• Resistor-adjustable Active Current Limit

• Fixed 0.5 A Short-circuit Current Limit

Thermal Shutdown Protection

Analog MOSFET Current Monitor Output: 100 μA/A

Open-drain FAULT Signaling

Operating Temperature: -40 °C to 125 °C

Low θ_JA, 16-pin 1.6 mm x 2.5 mm STQFN

• Pb-Free / Halogen-Free / RoHS compliant

•

Block Diagram

3.5 A @ 13 mΩ

VOUT

IOUT

VIN

100 μA/A

C_IN

C_LOAD

2.5 V to 5.5 V

VDD

Linear Ramp

Control

Charge

Pump

FAULT

ACL/SCL Detection &

Over Temperature

Protection

RSET

R_SET

40 kΩ

SW Closed

SW Open

ON/OFF

CMOS Input

GND

Datasheet

3-Feb-2022

Revision 1.05

Page 1 of 27

CFR0011-120-01

12 3 4 5 6 7...28

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