Datasheet > SLG46722

SLG46722

更新时间： 2024-11-06 14:58:11

品牌	Logo	应用领域
瑞萨 - RENESAS		/
页数	文件大小	规格书
88页	1113K
描述
GreenPAK? Programmable Mixed-signal Matrix

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SLG46722 数据手册

SLG46722

GreenPAK

Programmable Mixed Signal Array

ꢀꢀꢀꢀ

Features

Pin Configuration

•

Logic & Mixed Signal Circuits

Highly Versatile Macrocells

Read Back Protection (Read Lock)

1.8 V (±5 %) to 5 V (±10 %) Supply

Operating Temperature Range: -40 °C to 85 °C

RoHS Compliant / Halogen-Free

V_DD

GPI

GPIO

GND

20 19

20-pin STQFN: 2 x 3 x 0.55 mm, 0.4 mm pitch

GPIO

Applications

•

Personal Computers and Servers

PC Peripherals

Consumer Electronics

Data Communications Equipment

Handheld and Portable Electronics

STQFN-20

(Top View)

Block Diagram

Pin 20

GPIO

Pin 19

GPIO

Pin 18

GPIO

Pin 17

GPIO

Pin 1

Counters/Delay Generators

D Flip Flops (DFF) / Latches

Pin 16

GPIO

CNT0

CNT4

CNT1

CNT5

CNT2

CNT6

CNT3

DFF0

DFF3

DFF1

DFF5

DFF2

DFF6

Pin 2

GPI

CNT7

Pin 15

GPIO

Pin 3

GPIO

Combination Function Macrocells

Programmable

Delay

2-bit LUT2_0

3-bit LUT3_8

Pipe Delay

Pin 14

GPIO

Pin 4

GPIO

DFF4

RC Oscillator

Look Up Tables (LUTs)

Pin 13

GPIO

Pin 5

GPIO

2-bit

LUT2_1

2-bit

LUT2_2

3-bit

LUT3_3

2-bit

LUT2_4

2-bit

LUT2_5

3-bit

Additional Logic Functions

FILTER_0 FILTER_1

LUT3_0

LUT3_1

LUT3_2

LUT3_3

LUT3_4

Pin 12

GPIO

Pin 6

GPIO

3-bit

LUT3_5

3-bit

LUT3_6

3-bit

LUT3_7

3-bit

LUT3_9

4-bit

LUT4_0

Pin 11

GND

Pin 7

GPIO

Pin 8

GPIO

Pin 9

GPIO

Pin 10

GPIO

Revised August 15, 2023

Revision 1.20

12 3 4 5 6 7...88

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