Datasheet > SLG46621

SLG46621

更新时间： 2024-11-06 14:58:19

品牌	Logo	应用领域
瑞萨 - RENESAS		/
页数	文件大小	规格书
216页	3275K
描述
GreenPAK? Programmable Mixed-signal Matrix with Dual Supply

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中文翻译

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SLG46621 数据手册

SLG46621

GreenPAK

Programmable Mixed-signal Matrix

with Dual Supply

ꢀꢀꢀꢀ

Features

Pin Configuration

•

Logic & Mixed Signal Circuits

Highly Versatile Macrocells

Read Back Protection (Read Lock)

1.8 V (±5%) to 5 V (±10%) VDD

1.8 V (±5%) to 5 V (±10%) VDD2 (VDD2 ≤ VDD)

Operating Temperature Range: -40°C to 85°C

RoHS Compliant / Halogen-Free

VDD

GPI

GPIO

VDD2

GPIO

GND

20 19

GPIO

20-pin STQFN: 2 x 3 x 0.55 mm, 0.4 mm pitch

Applications

•

Personal Computers and Servers

PC Peripherals

Consumer Electronics

Data Communications Equipment

Handheld and Portable Electronics

STQFN-20

(Top View)

Block Diagram

LF Oscillator

RC Oscillator

PWR DET

Pin 20

GPIO

Pin 19

GPIO

Pin 18

GPIO

Ring Oscillator

Pin 1

VDD

Pin 17

GPIO

Counters/Delay Generators

Programmable

Delay0

ACMP0

CNT0

CNT5

CNT1

CNT2

CNT7

CNT3

CNT4

Pin 2

GPI

Pin 16

GPIO

CNT6

CNT8

CNT9

Programmable

Delay1

ACMP1

DFF/Latches

Pin 3

Pin 15

GPIO

DFF0

DFF1

DFF2

DFF3

DFF9

DFF4

DFF5

Pipe

Vref

Delay0

ACMP2

ACMP3

ACMP4

DFF6

DFF7

DFF8

DFF10

DFF11

Pin 4

GPIO

Pin 14

VDD2

Pipe

Delay1

POR

Look Up Tables (LUTs)

2-bit

LUT2_0

2-bit

LUT2_1

2-bit

LUT2_2

2-bit

LUT2_3

2-bit

LUT2_4

Additional

Logic Functions

Pin 5

GPIO

Pin 13

GPIO

2-bit

LUT2_5

2-bit

LUT2_6

2-bit

LUT2_7

3-bit

LUT3_0

3-bit

LUT3_1

INV_0

INV_1

3-bit

LUT3_2

3-bit

LUT3_3

3-bit

LUT3_4

3-bit

LUT3_5

3-bit

LUT3_6

Pin 6

GPIO

Pin 12

GPIO

3-bit

LUT3_7

3-bit

LUT3_8

3-bit

LUT3_9

3-bit

LUT3_10

3-bit

LUT3_11

Combination Function

Macrocell

4-bit LUT4_0

or PGEN

3-bit

LUT3_12

3-bit

LUT3_13

3-bit

LUT3_14

3-bit

LUT3_15

4-bit

LUT4_1

ACMP5

Pin 7

GPIO

Pin 11

GND

8-bit SAR

ADC

PGA

DAC0

DAC1

Pin 9

GPIO

Pin 10

GPIO

Pin 8

GPIO

Revised March 6, 2023

Revision 1.39

12 3 4 5 6 7...216

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