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SLG46538-AP PDF预览

SLG46538-AP

更新时间: 2024-11-06 02:52:23
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描述
GreenPAK Programmable Mixed-Signal Matrix with Asynchronous State Machine and Dual Supply

SLG46538-AP 数据手册

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SLG46538-A  
Preliminary  
GreenPAK Programmable Mixed-Signal Matrix  
with Asynchronous State Machine and Dual Supply  
General Description  
The SLG46538-A provides a small, low power component for commonly used Mixed-Signal functions. The user creates their  
circuit design by programming the one time Non-Volatile Memory (NVM) to configure the interconnect logic, the IO Pins, and the  
macrocells of the SLG46538-A. This highly versatile device allows a wide variety of Mixed-Signal functions to be designed within  
a very small, low power single integrated circuit.  
The additional power supply (VDD2) on the SLG46538-A provides the ability to interface two independent voltage domains within  
the same design. Users can configure pins, dedicated to each power supply, as inputs, outputs, or both (controlled dynamically  
by internal logic) to both VDD and VDD2 voltage domains. Using the available macrocells designers can implement Mixed-Signal  
functions bridging both domains or simply pass through level-translation in both High to Low and Low to High directions.  
Two Oscillators  
Key Features  
Configurable 25 kHz or 2 MHz  
25 MHz RC Oscillator  
Four Analog Comparators (ACMP)  
Two Voltage References (Vref)  
Nineteen Combination Function Macrocells  
Crystal Oscillator  
Power-On Reset  
Eight Byte RAM + OTP User Memory  
Three Selectable DFF/LATCH or 2-bit LUTs  
One Selectable Continuous DFF/LATCH or 3-bit LUT  
Four Selectable DFF/LATCH or 3-bit LUTs  
One Selectable Pipe Delay or 3-bit LUT  
One Selectable Programmable Function Generator or  
2-bit LUT  
RAM Memory Space that is Readable and Writable via  
I2C  
User Defined Initial Values Transferred from OTP  
Logic & Mixed-Signal Circuits  
Highly Versatile Macrocells  
Read Back Protection (Read Lock)  
Power Supply  
Five 8-bit Delays/Counters or 3-bit LUTs  
Two 16-bit Delays/Counters or 4-bit LUTs  
Two Deglitch Filters with Edge Detectors  
1.8 V (±5 %) to 5.0 V (±10 %) VDD  
State Machine  
1.8 V (±5 %) to 5.0 V (±10 %) VDD2 (VDD2 ≤ VDD  
)
Eight States  
Operating Temperature Range: -40 °C to 125 °C  
RoHS Compliant/Halogen-Free  
Available Package  
Flexible Input Logic from State Transitions  
Serial Communications  
I2C Protocol Compliant  
20-pin TQFN: 3.5 mm x 3.5 mm x 0.75 mm, 0.5 mm  
pitch  
Pipe Delay – 16 Stage/3 Output (Part of Combination  
Function Macrocell)  
AEC-Q100 Grade 1 Qualified  
Programmable Delay  
Additional Logic Functions  
One Inverter  
Applications  
Infotainment  
Navigation  
Advanced Driver Assistance Systems (ADAS)  
Automotive Display Clusters  
Body Electronics  
Datasheet  
22-Jul-2021  
Revision 2.3  
1 of 172  
© 2021 Dialog Semiconductor  
CFR0011-120-00  

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