Datasheet > SLA913F

SLA913F

更新时间： 2024-09-25 04:04:15

品牌	Logo	应用领域
爱普生 - EPSON		可编程逻辑
页数	文件大小	规格书
2页	24K
描述
High speed, high integration gate array

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技术参数
数据手册

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SLA913F 技术参数

生命周期：	Obsolete	包装说明：	,
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.84	Is Samacsys：	N
其他特性：	CAN ALSO BE OPERATED AT 5.0V	CLB-Max的组合延迟：	0.43 ns
等效关口数量：	7229	组织：	7229 GATES
可编程逻辑类型：	FIELD PROGRAMMABLE GATE ARRAY	认证状态：	Not Qualified
标称供电电压：	3.3 V	技术：	CMOS
Base Number Matches：	1

SLA913F 数据手册

PF841-03

SLA9000F Series

●High speed, high integration gate array.

●Number of gates mounted: 2.7K to 44K gates.

■ DESCRIPTION

The SLA9000F series is a SOG type CMOS gate which has realized high speed, high integration and high

driving capability. This series is offered with 2,784 to 44,070 gates to ensure an optimum application for any

mid size high speed systems.

This series is designed to operate on both 5 V and 3 V systems to correspond to increasing low-voltage

oriented applications. Simplified level shifter cell is available on this series. And, the µA order low noise output

cell of the series has made it suitable for small size, handy equipments and many other applications.

■ FEATURES

● Super-high density (adopting 1.0µm silicon gate CMOS with 2-metal layer)

● High-speed operation (operation delay of internal gate = 0.3ns at 5.0V, 2-input Power NAND standard)

● Simplified level shifter cells available

● Output drivability (IOL = 0.1, 2, 6, 12, 24 mA when 5.0V, IOL = 0.1, 1, 3, 6, 12mA when 3.3V)

● On-chip RAM available

● Low noise output cells available

■ PRODUCT LINEUP

Master

SLA902F

SLA904F

SLA907F SLA909F

SLA913F

SLA919F

SLA927F

SLA944F

Total BCs (Raw Gates)

Usable Bcs

2,784

1,809

4,392

2,854

100

7,872

4,723

128

9,540

5,724

144

13,144

7,229

160

19,350

10,642

184

27,234

13,617

208

44,070

22,035

256

Number of PADs

Internal Gates

tpd = 0.30ns (standard at 5.0V), tpd = 0.43ns (standard at 3.3V)

tpd = 0.91ns (standard at 5.0V), tpd = 1.08ns (standard at 3.3V)

tpd = 3.5ns (standard at 5.0V), tpd = 4.2ns (standard at 3.3V) CL = 50pF

TTL, CMOS

Propagation

Delay

Input Buffers

Output Buffers

I/O Level

Input Mode

Output Mode

TTL, CMOS, Pull-up/Pull-down, Schmitt, 3.0/3.3/5.0V Level interface

Normal, Open drain, 3-state, Bi-directional, 3.0/3.3/5.0V Level interface

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与SLA913F相关器件

型号	品牌	获取价格	描述	数据表
SLA915S	SEIKO	获取价格	Field Programmable Gate Array, 9516 Gates, CMOS
SLA917P	SEIKO	获取价格	暂无描述
SLA919F	EPSON	获取价格	High speed, high integration gate array
SLA919S	SEIKO	获取价格	Field Programmable Gate Array, 11794 Gates, CMOS
SLA922S	SEIKO	获取价格	Field Programmable Gate Array, 13172 Gates, CMOS
SLA926S	SEIKO	获取价格	Field Programmable Gate Array, 15000 Gates, CMOS
SLA927F	EPSON	获取价格	High speed, high integration gate array
SLA929S	SEIKO	获取价格	Field Programmable Gate Array, 17175 Gates, CMOS
SLA933S	SEIKO	获取价格	Field Programmable Gate Array, 19275 Gates, CMOS
SLA936P	SEIKO	获取价格	Field Programmable Gate Array, 18270 Gates, CMOS