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SK70708 PDF预览

SK70708

更新时间: 2024-02-11 14:10:36
品牌 Logo 应用领域
英特尔 - INTEL /
页数 文件大小 规格书
54页 502K
描述
Line Driver/Receiver, CMOS, PQCC44,

SK70708 技术参数

生命周期:Obsolete零件包装代码:LCC
包装说明:QCCJ,针数:44
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.2JESD-30 代码:S-PQCC-J44
长度:16.586 mm功能数量:1
端子数量:44最高工作温度:85 °C
最低工作温度:-25 °C封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装形状:SQUARE
封装形式:CHIP CARRIER认证状态:Not Qualified
座面最大高度:4.572 mm标称供电电压:5 V
表面贴装:YES电信集成电路类型:DIGITAL SLIC
温度等级:OTHER端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
宽度:16.586 mmBase Number Matches:1

SK70708 数据手册

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SK70704/SK70707 or SK70708  
1168 Kbps HSDL Data Pump Chip Set  
Datasheet  
The HDSL Data Pump is a chip set consisting of the following two devices:  
SK70704 Analog Core Chip (ACC)  
SK70707 (68-pin PLCC) or SK70708 (44-pin PLCC) HDSL Digital Transceiver (HDX)  
The HDSL Data Pump is a 2-wire transceiver which provides echo-cancelling and 2B1Q line  
coding. It incorporates transmit pulse shaping, filtering, line drivers, receive equalization, timing  
and data recovery to provide 1168 kbps, clear-channel, “data pipe” transmission. The Data Pump  
provides Near-End Cross-Talk (NEXT) performance in excess of that required over all ETSI test  
loops. Typical transmission range on 0.4 mm cable exceeds 3.6 km in a noise-free environment  
or 2.8 km with a 0 dB margin over 10 µV/Hz ETSI noise.  
The Data Pump meets the requirements of ETSI ETR-152. It provides one end of a single-channel  
HDSL transmission system from the twisted pair interface back to the Data Pump/HDSL data  
interface. The Data Pump can be used at either the NTU or the LTU end of the interface.  
Applications  
E1 (2-pair) and fractional E1 transport  
N-channel digital pair-gain  
Wireless base station to switch interface  
Campus and private networking  
High-Speed digital modems  
Product Features  
Fully integrated, 2-chip set for interfacing  
Programmable for either line termination  
(LTU) or network termination (NTU)  
applications  
to 2-wire HDSL lines at 1168 kbps  
Single +5 V supply  
Compliant with ETSI ETR-152 (1995)  
Compliant with ITU G.991.1  
Design allows for operation in either  
Software Control or stand alone Hardware  
Control mode  
Typical power consumption less than 1.2 W  
allowing remote power feeding for repeater  
and NTU equipment  
Integrated line drivers, filters and hybrid  
circuits result in greatly reduced external  
logic and simplified support circuitry  
requirements  
Simple line interface circuitry, via  
transformer coupling, to twisted pair line  
Internal ACC voltage reference  
Integrated VCO circuitry  
Converts serial binary data to scrambled  
Input or Output Reference Clock of 18.688  
MHz  
2B1Q  
encoded data  
Digital representation of receive signal  
level and noise margin values available for  
SNR controlled activation  
Self-contained activation/start-up state  
machine for simplified single loop designs  
As of January 15, 2001, this document replaces the Level One document  
SK70704/SK70707 or SK70708 — 1168 Kbps HSDL Data Pump Chip Set.  
Order Number: 249193-001  
January 2001  

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