SiT8208
Ultra Performance Oscillator
The Smart Timing Choice
The Smart Timing Choice
Features
Applications
Any frequency between 1 and 80 MHz accurate to 6 decimal places
100% pin-to-pin drop-in replacement to quartz-based oscillators
Ultra low phase jitter: 0.5 ps (12 kHz to 20 MHz)
Frequency stability as low as ±10 PPM
SATA, SAS, Ethernet, PCI Express, video, WiFi
Computing, storage, networking, telecom, industrial control
Industrial or extended commercial temperature range
LVCMOS/LVTTL compatible output
Standard 4-pin packages: 2.5 x 2.0, 3.2 x 2.5, 5.0 x 3.2,
7.0 x 5.0 mm x mm
Instant samples with Time Machine II and field programmable
oscillators
Outstanding silicon reliability of 2 FIT or 500 million hour MTBF
Pb-free, RoHS and REACH compliant
Ultra short lead time
[1]
Electrical Characteristics
Parameter
Output Frequency Range
Frequency Stability
Symbol
Min.
Typ.
Max.
Frequency Range
80 MHz
Unit
Condition
f
1
–
Frequency Stability and Aging
F_stab
-10
-20
-25
-50
-1.5
-5
–
–
–
–
–
–
+10
+20
+25
+50
+1.5
+5
PPM
PPM
PPM
PPM
PPM
PPM
Inclusive of Initial tolerance at 25 °C, and variations over
operating temperature, rated power supply voltage and load
First year Aging
10-year Aging
F_aging
T_use
Vdd
25°C
25°C
Operating Temperature Range
Operating Temperature Range
Supply Voltage
-20
-40
–
–
+70
+85
°C
°C
Extended Commercial
Industrial
Supply Voltage and Current Consumption
1.71
2.25
2.52
2.97
–
1.8
2.5
2.8
3.3
31
29
–
1.89
2.75
3.08
3.63
33
V
V
Supply voltages between 2.5V and 3.3V can be supported.
Contact SiTime for additional information.
V
V
Current Consumption
OE Disable Current
Idd
mA
mA
mA
No load condition, f = 20 MHz, Vdd = 2.5V, 2.8V or 3.3V
No load condition, f = 20 MHz, Vdd = 1.8V
–
31
I_OD
–
31
Vdd = 2.5V, 2.8V or 3.3V, OE = GND, output is Weakly Pulled
Down
–
–
–
–
30
70
mA
Vdd = 1.8 V. OE = GND, output is Weakly Pulled Down
Standby Current
I_std
A
Vdd = 2.5V, 2.8V or 3.3V, ST = GND, output is Weakly Pulled
Down
–
–
10
A
Vdd = 1.8 V. ST = GND, output is Weakly Pulled Down
LVCMOS Output Characteristics
Duty Cycle
DC
45
–
–
1.2
–
55
2
%
Rise/Fall Time
Tr, Tf
VOH
VOL
ns
15 pF load, 10% - 90% Vdd
Output Voltage High
Output Voltage Low
90%
–
–
Vdd
Vdd
IOH = -6 mA, IOL = 6 mA, (Vdd = 3.3V, 2.8V, 2.5V)
IOH = -3 mA, IOL = 3 mA, (Vdd = 1.8V)
–
10%
Input Characteristics
Input Voltage High
VIH
VIL
70%
–
–
–
30%
250
–
Vdd
Pin 1, OE or ST
Input Voltage Low
–
–
2
Vdd
kΩ
Pin 1, OE or ST
Input Pull-up Impedance
Z_in
100
–
Pin 1, OE logic high or logic low, or ST logic high
Pin 1, ST logic low
MΩ
Note:
1. All electrical specifications in the above table are specified with 15 pF output load and for all Vdd(s) unless otherwise stated.
SiTime Corporation
Rev. 1.02
990 Almanor Avenue
Sunnyvale, CA 94085
(408) 328-4400
www.sitime.com
Revised June 24, 2013