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SI9933CDY PDF预览

SI9933CDY

更新时间: 2024-11-27 09:25:39
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威世 - VISHAY /
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5页 189K
描述
Dual P-Channel 20-V (D-S) MOSFET

SI9933CDY 数据手册

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SPICE Device Model Si9933CDY  
Vishay Siliconix  
Dual P-Channel 20-V (D-S) MOSFET  
CHARACTERISTICS  
P-Channel Vertical DMOS  
Macro Model (Subcircuit Model)  
Level 3 MOS  
Apply for both Linear and Switching Application  
Accurate over the 55 to 125°C Temperature Range  
Model the Gate Charge, Transient, and Diode Reverse Recovery  
Characteristics  
DESCRIPTION  
The attached spice model describes the typical electrical  
characteristics of the p-channel vertical DMOS. The subcircuit  
model is extracted and optimized over the 55 to 125°C  
temperature ranges under the pulsed 0-V to 5-V gate drive. The  
saturated output impedance is best fit at the gate bias near the  
threshold voltage.  
A novel gate-to-drain feedback capacitance network is used to model  
the gate charge characteristics while avoiding convergence difficulties  
of the switched Cgd model. All model parameter values are optimized  
to provide a best fit to the measured electrical data and are not  
intended as an exact physical interpretation of the device.  
SUBCIRCUIT MODEL SCHEMATIC  
This document is intended as a SPICE modeling guideline and does not constitute a commercial product data sheet. Designers should refer to the appropriate  
data sheet of the same number for guaranteed specification limits.  
www.vishay.com  
Document Number: 64515  
S-83055Rev. A, 19-Jan-09  
1

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