Si8457DB
Vishay Siliconix
www.vishay.com
P-Channel 12 V (D-S) MOSFET
FEATURES
PRODUCT SUMMARY
• TrenchFET® p-channel Gen III and MICRO FOOT
power MOSFET technology provide extremely
low on-resistance per outline area
VDS (V)
RDS(on) () MAX.
ID (A) a, e
-10.2
-9.2
Qg (TYP.)
0.0190 at VGS = -4.5 V
0.0234 at VGS = -2.5 V
0.0350 at VGS = -1.8 V
-12
37 nC
• Ultra-small 1.6 mm x 1.6 mm maximum outline
• Ultra-thin 0.6 mm maximum height
-7.5
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
MICRO FOOT® 1.6 x 1.6
D
2
APPLICATIONS
D
3
S
• Power management
8457
xxx
1
G
G
4
1
S
Backside View
Bump Side View
Marking Code: 8457
D
Ordering Information:
Si8457DB-T1-E1 (Lead (Pb)-free and Halogen-free)
P-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
-12
UNIT
Drain-Source Voltage
Gate-Source Voltage
VDS
V
VGS
8
TA = 25 °C
A = 70 °C
-10.2 a
-8.2 a
-6.5 b
-5.2 b
-25
-2.3 a
-0.92 b
2.7 a
1.8 a
1.1 b
0.73 b
-55 to 150
260
T
Continuous Drain Current (TJ = 150 °C)
ID
TA = 25 °C
TA = 70 °C
A
Pulsed Drain Current (t = 100 μs)
IDM
IS
T
A = 25 °C
Continuous Source-Drain Diode Current
TA = 25 °C
TA = 25 °C
TA = 70 °C
TA = 25 °C
TA = 70 °C
Maximum Power Dissipation
PD
W
Operating Junction and Storage Temperature Range
Package Reflow Conditions c
TJ, Tstg
VPR
°C
IR / convection
260
Notes
a. Surface mounted on 1" x 1" FR4 board with full copper, t = 5 s.
b. Surface mounted on 1" x 1" FR4 board with minimum copper, t = 5 s.
c. Refer to IPC / JEDEC® (J-STD-020), no manual or hand soldering.
d. In this document, any reference to case represents the body of the MICRO FOOT device and foot is the bump.
e. Based on TA = 25 °C.
S15-1692-Rev. B, 20-Jul-15
Document Number: 64267
1
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000