Datasheet > SI5340B-B03498-GMR

SI5340B-B03498-GMR

更新时间： 2024-11-18 19:51:11

品牌	Logo	应用领域
芯科 - SILICON		外围集成电路
页数	文件大小	规格书
56页	2501K
描述
Processor Specific Clock Generator,

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中文翻译

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技术参数
数据手册

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SI5340B-B03498-GMR 技术参数

是否Rohs认证：	符合	生命周期：	Active
Reach Compliance Code：	unknown	风险等级：	5.68
峰值回流温度（摄氏度）：	260	处于峰值回流温度下的最长时间：	40
uPs/uCs/外围集成电路类型：	CLOCK GENERATOR, PROCESSOR SPECIFIC	Base Number Matches：	1

SI5340B-B03498-GMR 数据手册

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Si5341/40

LOW-JITTER, 10-OUTPUT, ANY-FREQUENCY, ANY-OUTPUT

CLOCK GENERATOR

Features



Generates up to 10 independent

output clocks

Ultra-low jitter: <100 fs RMS typical

MultiSynth™ technology enables any-

frequency synthesis on any-output

Highly configurable outputs

compatible with LVDS, LVPECL, CML,  Status monitoring: LOS, LOL

LVCMOS, HCSL, or programmable

voltage



DCO mode with frequency steps as

low as 0.001 ppb

Independent output clock supply pins:

3.3 V, 2.5 V, or 1.8 V

Built-in power supply filtering and

regulation



Serial Interface: I C or SPI (3-wire or

4-wire)

9x9 mm

7x7 mm

Input frequency range:



User programmable (2x) non-volatile

OTP memory

External crystal: 25, 48-54 MHz

Differential clock: 10 to 750 MHz

LVCMOS clock: 10 to 250 MHz

Output frequency range:

Differential: 100 Hz to 712.5 MHz

LVCMOS: 100 Hz to 250 MHz

Output-output skew: 20 ps typ

Adjustable output-output delay

Optional zero delay mode

Ordering Information



ClockBuilder Pro software utility

See Section 8.

simplifies device configuration and

assigns customer part numbers

Si5341: 4 input, 10 output, compact

9x9 mm, 64 QFN

Si5340: 4 input, 4 output, compact

7x7 mm, 44 QFN



Functional Block Diagram



Temperature range: –40 to +85 °C

Pb-free, RoHS-6 compliant

Independent glitchless on-the-fly

output frequency changes

Si5341/40

IN_SEL[1:0]

Device Selector Guide

IN0

IN1

IN2

÷INT

Grade

Si534xA

Si534xB

Si534xC

Si534xD

Max Output Frequency

712.5 MHz

Frequency Synthesis Mode

Integer + Fractional

PLL

350 MHz

712.5 MHz

OSC

Integer Only

350 MHz

FB_IN

÷INT

Applications



Clock tree generation replacing XOs,



Ethernet switches/routers

OTN framers/mappers/processors

Test equipment & instrumentation

Broadcast video

Multi

Synth

buffers, signal format translators

Any-frequency clock translation

Clocking for FPGAs, processors,

memory

÷INT

OUT0

OUT1

OUT2



Multi

Synth

Multi

Synth

÷INT

Description

Multi

Synth

OUT3

OUT4

OUT5

OUT6

OUT7

OUT8

OUT9

The any-frequency, any-output Si5341/40 clock generators combine a wide-band PLL

with proprietary MultiSynth fractional synthesizer technology to offer a versatile and

high performance clock generator platform. This highly flexible architecture is capable

of synthesizing a wide range of integer and non-integer related frequencies up to

712.5 MHz on 10 differential clock outputs while delivering sub-100 fs rms phase jitter

performance with 0 ppm error. Each of the clock outputs can be assigned its own

format and output voltage enabling the Si5341/40 to replace multiple clock ICs and

oscillators with a single device making it a true “clock tree on a chip”.

Multi

Synth

NVM

I²C/SPI

The Si5341/40 can be quickly and easily configured using ClockBuilder Pro software.

Custom part numbers are automatically assigned using a ClockBuilder Pro for fast,

free, and easy factory pre-programming, or the Si5341/40 can be programmed in-

Control/

Status

circuit via I C and SPI serial interfaces.

Rev. 1.0 7/15

Si5341/40

12 3 4 5 6 7...56

中文翻译

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