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SI53341-B-GM PDF预览

SI53341-B-GM

更新时间: 2024-09-17 19:52:15
品牌 Logo 应用领域
芯科 - SILICON 驱动逻辑集成电路
页数 文件大小 规格书
38页 972K
描述
Low Skew Clock Driver, 53341 Series, 8 True Output(s), 0 Inverted Output(s), QFN-16

SI53341-B-GM 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active包装说明:HVQCCN,
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:2.31其他特性:ALSO OPERATES AT 2.5V VCC AND 3.3V VCC NOMINAL SUPPLY
系列:53341输入调节:DIFFERENTIAL MUX
JESD-30 代码:S-XQCC-N16长度:3 mm
逻辑集成电路类型:LOW SKEW CLOCK DRIVER功能数量:1
反相输出次数:端子数量:16
实输出次数:8最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE传播延迟(tpd):1.05 ns
Same Edge Skew-Max(tskwd):0.05 ns座面最大高度:0.9 mm
最大供电电压 (Vsup):1.89 V最小供电电压 (Vsup):1.71 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
温度等级:INDUSTRIAL端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
宽度:3 mmBase Number Matches:1

SI53341-B-GM 数据手册

 浏览型号SI53341-B-GM的Datasheet PDF文件第2页浏览型号SI53341-B-GM的Datasheet PDF文件第3页浏览型号SI53341-B-GM的Datasheet PDF文件第4页浏览型号SI53341-B-GM的Datasheet PDF文件第5页浏览型号SI53341-B-GM的Datasheet PDF文件第6页浏览型号SI53341-B-GM的Datasheet PDF文件第7页 
Si53340-45 Data Sheet  
Low-Jitter LVDS Fanout Clock Buffers with up to 10 LVDS Out-  
puts from Any-Format Input and Wide Frequency Range from dc  
up to 1250 MHz  
KEY FEATURES  
• Ultra-low additive jitter: 50 fs rms  
• Built-in LDOs for high PSRR performance  
• Up to 10 LVDS Outputs  
The Si53340-45 family of LVDS fanout buffers is ideal for clock/data distribution and re-  
dundant clocking applications. These devices feature typical ultra-low jitter of 50 fs and  
operate over a wide frequency range from dc to 1250 MHz. Built-in LDOs deliver high  
PSRR performance and reduces the need for external components simplifying low jitter  
clock distribution in noisy environments.  
• Any-format Inputs (LVPECL, Low-Power  
LVPECL, LVDS, CML, HCSL, LVCMOS)  
• Wide frequency range: dc to 1250 MHz  
• Output Enable option  
They are available in multiple configurations and offer a selectable input clock using a  
2:1 input mux. Other features include independent output enable and built-in format  
translation. These buffers can be paired with the Si534x clocks and Si5xx oscillators to  
deliver end-to-end clock tree performance.  
• Multiple configuration options  
• 2:1 Input Mux  
• RoHS compliant, Pb-free  
• Temperature range: –40 to +85 °C  
VDD  
4 Outputs  
Si53340/41  
Si53342/43  
Si53344/45  
4
Power Supply  
Filtering  
VDDOA  
OEAb  
3 Outputs  
3
0
1
CLK0*  
3
3 Outputs  
CLK1*  
OEBb  
VDDOB  
CLK_SEL  
10  
10 Outputs  
*Si53341/43/45 require Single-ended Inputs  
silabs.com | Smart. Connected. Energy-friendly.  
Rev. 1.2  

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