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SI52112-A1-GM2 PDF预览

SI52112-A1-GM2

更新时间: 2024-11-26 19:44:03
品牌 Logo 应用领域
芯科 - SILICON 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
20页 1191K
描述
Processor Specific Clock Generator, 100MHz, CMOS, PDSO10, 3 X 3 MM, ROHS COMPLIANT, MO-229, TDFN-10

SI52112-A1-GM2 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active包装说明:HVSON,
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:1.23
JESD-30 代码:S-PDSO-N10JESD-609代码:e3
长度:3 mm湿度敏感等级:1
端子数量:10最高工作温度:85 °C
最低工作温度:-40 °C最大输出时钟频率:100 MHz
封装主体材料:PLASTIC/EPOXY封装代码:HVSON
封装形状:SQUARE封装形式:SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):NOT SPECIFIED主时钟/晶体标称频率:25 MHz
座面最大高度:0.8 mm最大供电电压:3.46 V
最小供电电压:3.13 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, PROCESSOR SPECIFIC
Base Number Matches:1

SI52112-A1-GM2 数据手册

 浏览型号SI52112-A1-GM2的Datasheet PDF文件第2页浏览型号SI52112-A1-GM2的Datasheet PDF文件第3页浏览型号SI52112-A1-GM2的Datasheet PDF文件第4页浏览型号SI52112-A1-GM2的Datasheet PDF文件第5页浏览型号SI52112-A1-GM2的Datasheet PDF文件第6页浏览型号SI52112-A1-GM2的Datasheet PDF文件第7页 
Si52112-A1/A2  
PCI-EXPRESS GEN 1 DUAL OUTPUT CLOCK GENERATOR  
Features  
PCI-Express Gen 1 compliant  
3.3 V Power supply  
Low power HCSL differential  
Small package 10-pin TDFN  
output buffers  
(3x3 mm)  
Supports Serial-ATA (SATA) at Si52112-A1 does not support  
100 MHz spread spectrum outputs  
No termination resistors required Si52112-A2 supports 0.5% down  
spread outputs  
25 MHz Crystal Input or Clock  
input  
For PCIe Gen 2 applications, see  
Si52112-B3/B4  
Triangular spread spectrum  
profile for maximum EMI  
reduction (Si52112-A2)  
Ordering Information:  
For PCIe Gen 3 applications, see  
See page 13  
Si52112-B5/B6  
Extended Temperature:  
–40 to 85 °C  
Pin Assignments  
Applications  
VDD  
1
2
3
4
5
10  
9
VDD  
Network Attached Storage  
Multi-function Printer  
Wireless Access Point  
Routers  
DIFF2  
XOUT  
8
DIFF2  
DIFF1  
XIN/CLKIN  
VSS  
Description  
7
Si52112-A1/A2 is a high-performance, PCIe clock generator that can  
source two PCIe clocks from a 25 MHz crystal or clock input. The clock  
outputs are compliant to PCIe Gen 1 specifications. The ultra-small  
footprint (3x3 mm) and industry leading low power consumption make  
Si52112-A1/A2 the ideal clock solution for consumer and embedded  
applications.  
VSS  
6
DIFF1  
Patents pending  
VDD  
DIFF1  
XIN/CLKIN  
XOUT  
PLL  
Divider  
DIFF2  
VSS  
Rev 1.2 7/14  
Copyright © 2014 by Silicon Laboratories  
Si52112-A1/A2  

SI52112-A1-GM2 替代型号

型号 品牌 替代类型 描述 数据表
SI52112-B3-GM2 SILICON

完全替代

Processor Specific Clock Generator, 100MHz, CMOS, PDSO10, 3 X 3 MM, ROHS COMPLIANT, MO-229
SI52112-B5-GM2 SILICON

完全替代

Processor Specific Clock Generator, 100MHz, CMOS, PDSO10, 3 X 3 MM, ROHS COMPLIANT, MO-229

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This change is considered a minor change which does not affect form, fit, function, qualit
SI52112-B3-GM2 SILICON

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SI52112-B3-GM2R SILICON

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This change is considered a minor change which does not affect form, fit, function, qualit
SI52112-B4 SILICON

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SI52112-B4-GM2R SILICON

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Processor Specific Clock Generator, 100MHz, CMOS, PDSO10, 3 X 3 MM, ROHS COMPLIANT, MO-229