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SI52111-A1-GTR

更新时间: 2024-11-25 15:51:11
品牌 Logo 应用领域
芯科 - SILICON 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
20页 1191K
描述
Processor Specific Clock Generator, 100MHz, CMOS, PDSO8, ROHS COMPLIANT, MO-153AA, TSSOP-8

SI52111-A1-GTR 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:TSSOP,Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.14JESD-30 代码:R-PDSO-G8
长度:4.4 mm端子数量:8
最高工作温度:85 °C最低工作温度:-40 °C
最大输出时钟频率:100 MHz封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
主时钟/晶体标称频率:25 MHz座面最大高度:1.2 mm
最大供电电压:3.46 V最小供电电压:3.13 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, PROCESSOR SPECIFIC
Base Number Matches:1

SI52111-A1-GTR 数据手册

 浏览型号SI52111-A1-GTR的Datasheet PDF文件第2页浏览型号SI52111-A1-GTR的Datasheet PDF文件第3页浏览型号SI52111-A1-GTR的Datasheet PDF文件第4页浏览型号SI52111-A1-GTR的Datasheet PDF文件第5页浏览型号SI52111-A1-GTR的Datasheet PDF文件第6页浏览型号SI52111-A1-GTR的Datasheet PDF文件第7页 
Si52111-A1/A2  
PCI-EXPRESS GEN 1 SINGLE OUTPUT CLOCK  
GENERATOR  
Features  
PCI-Express Gen 1 compliant  
3.3 V Power supply  
Low power HCSL differential  
Small package 10-pin TDFN  
output buffer  
(3x3 mm)  
Supports Serial-ATA (SATA) at Si52111-A1 does not support  
100 MHz spread spectrum outputs  
No termination resistors required Si52111-A2 supports 0.5% down  
spread outputs  
25 MHz Crystal Input or Clock  
input  
For PCIe Gen 2 applications, see  
Si52111-B3/B4  
Triangular spread spectrum  
profile for maximum EMI  
reduction (Si52111-A2)  
For PCIe Gen 3 applications, see  
Si52111-B5/B6  
Extended Temperature:  
Ordering Information:  
See page 13  
–40 to 85 °C  
Applications  
Pin Assignments  
Network Attached Storage  
Multi-function Printer  
Wireless Access Point  
Routers  
VDD  
1
2
3
4
5
10  
9
VDD  
NC  
Description  
XOUT  
Si52111-A1/A2 is a high-performance, PCIe clock generator that can  
source one PCIe clock output from a 25 MHz crystal or clock input. The  
clock output is compliant to PCIe Gen 1 specifications. The ultra-small  
footprint (3x3 mm) and industry leading low power consumption make  
Si52111-A1/A2 the ideal clock solution for consumer and embedded  
applications.  
8
NC  
XIN/CLKIN  
VSS  
7
DIFF1  
DIFF1  
VSS  
6
Patents pending  
VDD  
XIN/CLKIN  
XOUT  
PLL  
Divider  
DIFF1  
VSS  
Rev 1.2 7/14  
Copyright © 2014 by Silicon Laboratories  
Si52111-A1/A2  

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