Datasheet > SI51218-A1JAFM

SI51218-A1JAFM

更新时间： 2024-11-25 18:42:39

品牌	Logo	应用领域
芯科 - SILICON		驱动逻辑集成电路
页数	文件大小	规格书
15页	471K
描述
PLL Based Clock Driver,

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中文翻译

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技术参数
数据手册

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SI51218-A1JAFM 技术参数

是否Rohs认证：	符合	生命周期：	Active
Reach Compliance Code：	compliant	风险等级：	5.57
逻辑集成电路类型：	PLL BASED CLOCK DRIVER	峰值回流温度（摄氏度）：	NOT SPECIFIED
处于峰值回流温度下的最长时间：	NOT SPECIFIED	Base Number Matches：	1

SI51218-A1JAFM 数据手册

Si51218 Data Sheet

Three Output Factory Programmable Clock Generator

KEY FEATURES

The factory programmable Si51218 is a low power, small footprint and frequency flexible

programmable clock generator targeting low power, low cost and high volume consumer

and embedded applications. The device operates from a single crystal or an external

clock source and generates up to 3 outputs from 32.768 kHz to 170 MHz. The device is

factory programmed to provide customized output frequencies and control input such as

power down and output enable.

• Generates up to 3 LVCMOS clock outputs

from 32.768 kHz to 170 MHz

• Accepts crystal or reference clock input

• 3 to 165 MHz reference clock input

• 8 to 48 MHz crystal input

• Programmable OE input function

Applications

• Portable devices

• DTV/IPTV

• Crystal/XO replacement

• Digital media players

CLKOUT1/REFOUT1

(VDD)/OE

PLL with

Modulation

Control

XIN/

CLKIN

Buffers,

Dividers,

and

Switch

Matrix

XOUT

VDDO

VDD

CLKOUT2/REFOUT2

(VDDO)/

Programmable

Configuration

To Pin 6/7

V-REG

To Core

To Pin 4

CLKOUT3 (VDDO)

VSS

silabs.com | Smart. Connected. Energy-friendly.

Rev. 1.1

12 3 4 5 6 7...15

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