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SI4133W

更新时间: 2024-11-19 04:04:47
品牌 Logo 应用领域
芯科 - SILICON GSM无线通信
页数 文件大小 规格书
32页 515K
描述
RF SYNTHESIZER WITH INTEGRATED VCOS FOR W-CDMA AND GSM/UMTS WIRELESS COMMUNICATIONS

SI4133W 数据手册

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Si4133W  
RF SYNTHESIZER WITH INTEGRATED VCOS  
FOR W-CDMA AND GSM/UMTS WIRELESS COMMUNICATIONS  
Features  
Dual RF synthesizers  
RF1: 2.3 GHz to 2.6 GHz  
RF2: 750 MHz to 1.7 GHz  
IF synthesizer  
Continuous operation over a  
wide temperature range  
Fast settling time: 200 µsec  
Low phase noise  
IF: 62.5 MHz to 1.0 GHz  
5 µA standby current  
Ordering Information:  
Integrated VCOs, loop filters, 28-lead MLP, 5 x 5 mm  
dividers, and phase detectors  
See page 28.  
Minimal external components  
Pin Assignments  
Applications  
Si4133W-BM  
Single-mode W-CDMA wireless Dual-mode GSM/UMTS wireless  
handsets, terminals, and  
modems  
handsets, terminals, and  
modems  
GNDR  
RFLD  
RFLC  
GNDR  
NC  
GNDI  
IFLB  
Description  
IFLA  
The Si4133W is a monolithic integrated circuit that performs RF and IF  
synthesis for GSM/GPRS and W-CDMA wireless communications. In dual-  
mode GSM/UMTS handsets, the Si4133W meets demanding requirements  
for very low phase noise and fast settling time for both modes. The Si4133W  
integrates three complete phase-locked loops (PLLs) on a single die  
including VCOs, loop filters, reference and VCO dividers, and phase  
detectors. Dividers and powerdown settings are programmable through a  
three-wire serial interface.  
GNDD  
VDDD  
GNDR  
GNDR  
GNDD  
XIN  
Patents pending  
Functional Block Diagram  
Reference  
XIN  
÷R  
÷R  
÷R  
Phase  
Amplifier  
Detector  
RF1  
RF2  
IF  
Power  
Down  
PWDNB  
RFOUT  
÷N  
÷N  
÷N  
Control  
SDATA  
SCLK  
RFLC  
RFLD  
Serial  
Interface  
Phase  
Detector  
22-bit  
Data  
SENB  
Register  
Test  
Mux  
Phase  
Detector  
AUXOUT  
IFDIV  
IFOUT  
IFLA  
IFLB  
Rev. 1.1 9/02  
Copyright © 2002 by Silicon Laboratories  
Si4133W-DS11  

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