Si4133G-X2
DUAL-BAND RF SYNTHESIZER WITH INTEGRATED VCOS
FOR GSM AND GPRS WIRELESS COMMUNICATIONS
Features
ꢀ
Dual-Band RF Synthesizers ꢀ Optimized for Use with Hitachi
ꢁ RF1: 900 MHz to 1.8 GHz
ꢁ RF2: 750 MHz to 1.5 GHz
IF Synthesizer
ꢁ 1070.4, 1080, and 1089.6 MHz
Integrated VCOs, Loop Filters,
Varactors, and Resonators
Bright2+ Transceiver
Settling Time < 150 µs
Low Phase Noise
Programmable Power Down
Modes
Si4133G-XT2
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
1 µA Standby Current
Ordering Information
Minimal External Components ꢀ 18 mA Typical Supply Current
Required
See page 27.
ꢀ
2.7 V to 3.6 V Operation
Packages: 24-Pin TSSOP and
28-Pin MLP
ꢀ
Pin Assignments
Applications
GSM900, DCS1800, and
Si4133G-XT2
ꢀ
ꢀ
GPRS Data Terminals
SENB
VDDI
SCLK
SDATA
GNDR
RFLD
1
24
23
22
21
20
19
18
17
16
15
14
13
PCS1900 Cellular Telephones ꢀ HSCSD Data Terminals
2
IFOUT
GNDI
3
Description
4
The Si4133G-X2 is a monolithic integrated circuit that performs both IF and
dual-band RF synthesis for GSM and GPRS wireless communications
applications. The Si4133G-X2 includes three VCOs, loop filters, reference
and VCO dividers, and phase detectors. Divider and power down settings
are programmable through a three-wire serial interface.
IFLB
RFLC
5
IFLA
GNDR
RFLB
6
GNDD
VDDD
GNDD
XIN
7
RFLA
8
GNDR
GNDR
RFOUT
VDDR
9
10
11
12
Functional Block Diagram
PWDNB
AUXOUT
Reference
Amplifier
÷65
XIN
RFLA
RFLB
Phase
Detector
Power
Down
Control
Si4133G-XM2
RF1
RF2
IF
PWDNB
÷
N
RFOUT
SDATA
SCLK
RFLC
RFLD
Serial
Interface
Phase
Detector
28
27
26
25
24
23
22
1
2
3
4
5
6
7
21
20
19
18
17
16
15
GNDR
RFLD
RFLC
GNDR
RFLB
RFLA
GNDR
GNDI
IFLB
22-bit
Data
Register
SENB
÷N
IFLA
Test
Mux
Phase
Detector
GNDD
VDDD
GNDD
XIN
AUXOUT
IFOUT
IFLA
IFLB
÷N
8
9
10
11
12
13
14
Patents pending
Rev. 0.9 8/00
Copyright © 2000 by Silicon Laboratories
Si4133GX2-DS09
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.