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SI2400 PDF预览

SI2400

更新时间: 2024-10-29 22:33:51
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76页 1381K
描述
V.22BIS ISOMODEM⑩ WITH INTEGRATED GLOBAL DAA

SI2400 数据手册

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Si2400  
V.22BIS ISOMODEMWITH INTEGRATED GLOBAL DAA  
Features  
! Data Modem Formats  
" 2400 bps: V.22bis  
! Integrated DAA  
Si2400  
" Capacitive Isolation  
" 1200 bps: V.22, V.23, Bell 212A  
" 300 bps: V.21, Bell 103  
" Parallel Phone Detect  
" Globally Compliant Line Interface  
" Overcurrent Protection  
" V.25 Fast Connect and V.23 Reversing  
" SIA and other security protocols  
! Caller ID Detection and Decode  
! DTMF Tone Gen./Detection  
! 3.3 V or 5.0 V Power  
! UART with Flow Control  
Si3015  
! AT Command Set Support  
! Integrated Voice Codec  
! PCM Data Pass-Through Mode  
! HDLC Framing in Hardware  
! Call Progress Support  
Ordering Information  
See page 71.  
Applications  
Pin Assignments  
! Set Top Boxes  
! Power Meters  
! Security Systems ! Medical Monitoring  
! ATM Terminals ! Point-of-Sale  
Si2400  
XTALI  
EOFR/GPIO1  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
Description  
XTALO  
CLKOUT  
VD  
AIN/GPIO2  
ESC/GPIO3  
ISOB  
The Si2400 ISOmodem™ is a complete modem chipset with integrated  
direct access arrangement (DAA) that provides a programmable line  
interface to meet global telephone line requirements. Available in two 16-  
pin small outline (SOIC) packages, it eliminates the need for a separate  
DSP data pump, modem controller, analog front end (AFE), isolation  
transformer, relays, opto-isolators, 2- to 4-wire hybrid, and voice codec.  
The Si2400 is ideal for embedded modem applications due to its small  
board space, low power consumption, and global compliance.  
TXD  
GND  
RXD  
C1A  
CTS  
ALERT/GPIO4  
AOUT  
RESET  
Si3015  
QE2  
DCT  
IGND  
C1B  
FILT2  
FILT  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
RX  
Functional Block Diagram  
REXT  
REXT2  
REF  
RNG1  
RNG2  
QB  
Si2400  
Si3015  
TXD  
RXD  
VREG2  
VREG  
RX  
µ
Controller  
QE  
(AT Decoder  
Call Progress)  
Hybrid  
and  
DC  
FILT  
FILT2  
REF  
RESET  
Termination  
Patents pending  
DCT  
EOFR/GPIO1  
AIN/GPIO2  
ESC/GPIO3  
DSP  
(Data Pump)  
VREG2  
REXT  
REXT2  
Control  
Interface  
ALERT/GPIO4  
CTS  
RNG1  
RNG2  
QB  
Ring Detect  
Off-Hook  
Audio  
Codec  
QE  
QE2  
CLKOUT  
XTALI  
Clock  
Interface  
XTALO  
AOUT  
Rev. 0.95 4/00  
Copyright © 2000 by Silicon Laboratories  
Si2400-DS095  

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