Datasheet > SG-51

SG-51

更新时间： 2024-11-26 04:04:55

品牌	Logo	应用领域
爱普生 - EPSON		振荡器晶体振荡器
页数	文件大小	规格书
2页	78K
描述
FULL & HALF-SIZE DIP HIGH-FREQUENCY CRYSTAL OSCILLATOR

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中文翻译

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数据手册

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SG-51 数据手册

Crystal oscillator

FULL-SIZE DIP HIGH-FREQUENCY CRYSTAL OSCILLATOR

SG-51 series

HALF-SIZE DIP HIGH-FREQUENCY CRYSTAL OSCILLATOR

SG-531 series

Product number (please refer to page 1)

Q325 10xxxx xxx 00

Q325 31xxxx xxx 00

SG-51

SG-531

• Pin compatible with full-size metal can. (SG-51 series)

• Pin compatible with half-size metal can. (SG-531 series)

• Cylindrical AT-cut crystal unit builtin, thus assuring high reliability.

• Use of CMOS IC enables reduction of current consumption.

Actual size

Specifications

SG-51PTJ/531PTJ

Symbol

Remarks

Item

SG-51P/531P

SG-51PH/531PH

1.0250 MHz to

26.0000 MHz

Refer to page 31. "Frequency range"

26.0001 MHz to 66.6667 MHz

Output frequency range

-0.3 V to +7.0 V

5.0 V±0.5 V

-0.5 V to +7.0 V

Max. supply voltage

DD-GND

Power source

voltage

Operating voltage

Storage temperature

Operating temperature

STG

OPR

-55 °C to +125 °C

-20 °C to +70 °C (-40 °C to +85 °C)

Stored as bare product after unpacking

Refer to page 31. "Frequency range"

Temperature

range

-6

B: ± 50 x 10

Frequency stability

∆f/f

B type is possible up to 55.0 MHz

-6

C: ±100 x 10

Iop

IOE

No load condition

OE=GND

23 mA Max.

12 mA Max.

40 % to 60 %

35 mA Max.

Current consumption

Output disable current

28 mA Max.

—

20 mA Max.

40 % to 60 %

—

1/2 V^DDlevel

1.4 V level

CMOS level

tw/t

Duty

45 % to 55 %

TTL level

V^DD-0.4 V Min.

2.4 V Min.

0.4 V Max.

—

VDD -0.4 V Min.

OH = -400 µA (P,PTJ) /-4 mA (PH)

Output voltage

OL = 16 mA (P) / 8 mA (PTJ) / 4mA (PH)

VOL

CMOS

TTL

50 pF Max.

10 TTL Max.

2.0 V Min.

0.8 V Max.

50 pF Max.

—

Output load

condition (fan out)

5 TTL Max.

3.5 V Min.

1.5 V Max.

C^L≤15 pF

IIH=1 µA Max. (OE=VDD)

VIH

2.0 V Min.

0.8 V Max.

7 ns Max.

—

Output enable/disable input voltage

VIL

I^IL= -100 µA Min. (OE=GND), PTJ: IIL = -500 µA Min. (OE=GND)

CMOS load: 20 %→80 % VDD

TTL load: 0.4 V→2.4 V

CMOS level

Output

rise time

—

TLH

8 ns Max.

TTL level

CMOS level

TTL level

5 ns Max.

—

5 ns Max.

CMOS load: 80 %→20 % VDD

TTL load: 2.4 V→0.4 V

7 ns Max.

—

Output

fall time

THL

More than for 1 ms until V^DD=0 V→4.5 V

Time at 4.5 V to be 0 s

OSC

Oscillation start up time

Aging

4 ms Max.

10 ms Max.

-6

±5 x 10 /year Max.

Ta=+25 °C, VDD =5 V,first year

Three drops on a hard board from 750 mm or

excitation test with 29400 m/s x 0.3 ms x 1/2

-6

±20 x 10 Max.

S.R.

Shock resistance

sine wave in 3 directions

Note: • Unless otherwise stated, characteristics (specifications) shown in the above table are based on the rated operating temperature and voltage condition.

• External by-pass capacitor is recommended.

(Unit: mm)

19.8 Max.

13.7 Max.

Pin terminal

NO.

Pin terminal

NO.

#14

OE or ST

GND

OUT

V^DD

7.62

0.25

0.51

90° to

105°

90° to

105°

0.51

15.24

7.62

Note.

OE Pin (P, PTJ, PH, PTW, PHW, PCW)

ST pin (STW, SHW, SCW)

ST pin - "H" or "open" : Specified frequency output.

ST pin - "L" : Output is low level (weak pull - down), oscillation stops.

OE pin - "H" or "open" : Specified frequency output.

OE pin - "L" : Output is high impedance.

中文翻译

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