SFH6318T
SFH6319T
LOW CURRENT, HIGH GAIN
OPTOCOUPLER
Package Dimensions in Inches (mm)
.120±.002
(3.05±.05)
NC
8
7
1
2
VCC
VB
Anode
FEATURES
.154±.002
(.391±.05)
C
.240
(6.10)
L
•
Industry Standard SOIC-8 Surface Mountable
Package
6
5
3
4
Cathode
NC
V0
GND
.016
(.41)
•
•
•
•
•
•
•
•
High Current Transfer Ratio, 800%
Low Input Current, 0.5mA
High Output Current, 60mA
Pin 1
7°
40°
.058±.005
(1.49±.13)
.015±.002
(.38±.05)
.192±.005
(4.88±.13)
Isolation Test Voltage, 2500 VAC
RMS
.004 (.10)
.008 (.20)
TTL Compatible Output, V =0.1 V
OL
Adjustable Bandwidth-Access to Base
Underwriters Lab File #E52744
.125±.005
(3.18±.13)
.008 (.20)
5° max.
R.010
Lead
.021
(.53)
.050
(1.27)
typ.
.020±.004
(.15±.10)
2 plcs.
(.25)
max.
Coplanarity
±.0015 (.04
max.
Available in Tape and Reel (suffix T)
APPLICATIONS
•
Logic Ground Isolation-TTL/TTL, TTL/CMOS,
CMOS/CMOS, CMOS/TTL
TOLERANCE: ±.005 (unless otherwise noted)
Maximum Ratings (25°)
Emitter
•
•
EIA RS 232C Line Receiver
Low Input Current Line Receiver-Long Lines,
Party Lines
Telephone Ring Detector
117 VAC Line Voltage Status Indication-Low
Input Power Dissipation
Reverse Input Voltage.............................................................. 3 V
Supply and Output Voltage, V (pin 8-5), V (pin 6-5)
SFH6318T..................................................................–0.5 to 7 V
SFH6319T................................................................–0.5 to 18 V
Input Power Dissipation ..................................................... 35mW
Derate Linearly above 50°C
Free Air Temperature................................................ 0.7 mW/°C
Average Input Current......................................................... 20 mA
Peak Input Current .............................................................. 40 mA
(50% Duty Cycle-1 ms pulse width)
•
•
CC
O
•
Low Power Systems-Ground Isolation
DESCRIPTION
Very high current ratio together with 2500 VAC isolation
are achieved by coupling an LED with an integrated high
gain photodetector in a SOIC-8 package. Separate pins
for the photodiode and output stage enable TTL compat-
ible saturation voltages with high speed operation. Pho-
todarlington operation is achieved by tying the VCC and
VO terminals together. Access to the base terminal
allows adjustment to the gain bandwidth.
Peak Transient Input Current
(tp≤1 µsec, 300 pps) ......................................................... 1.0 A
Detector (Si Photodiode + Photodarlington)
Output Current I (pin 6)..................................................... 60 mA
O
Emitter-Base Reverse Voltage (pin 5-7)................................ 0.5 V
Output Power Dissipation................................................. 150 mW
Derate Linearly from 25°C ........................................... 2 mW/°C
Package
Storage Temperature ......................................... –55°C to +125°C
Operating Temperature........................................ –40°C to +85°C
Lead Soldering Temperature (t=10 sec.).............................260°C
Junction Temperature ..........................................................100°C
Ambient Temperature Range............................. –55°C to +100°C
IsolationTest Voltage between
The SFH6318T is ideal for TTL applications since the
300% minimum current transfer ratio with an LED current
of 1.6 mA enables operation with one unit load-in and
one unit load-out with a 2.2 KΩ pull-up resistor.
The SFH6319T is best suited for low power logic applica-
tions involving CMOS and low power TTL. A 400% cur-
rent transfer ratio with only 0.5 mA of LED current is
guaranteed from 0°C to 70°C.
Emitter and Detector............................................ 2500 VAC
(refer to climate DIN 40046, part 2, Nov. 74)
Pollution Degree (DIN VDE 0110) ................................................2
Creepage Distance.............................................................≥4 mm
Clearance............................................................................≥4 mm
Comparative Tracking Index
RMS
Caution:
Due to the small geometries of this device, it should be
handled with Electrostatic Discharge (ESD) precautions.
Proper grounding would prevent damage further and/or
degradation which may be induced by ESD.
per DIN IEC 112/VDE 0303, part 1.......................................175
Isolation Resistance
12
V
V
=500 V, T =25°C R .............................................≥10
ISOL
Ω
Ω
IO
IO
A
11
=500 V, T =100°C R
...........................................≥10
A
ISOL
10.95
Semiconductor Goup
4–48
This document was created with FrameMaker 4.0.3