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SED1528DAA PDF预览

SED1528DAA

更新时间: 2024-11-08 10:12:51
品牌 Logo 应用领域
精工 - SEIKO 驱动
页数 文件大小 规格书
38页 251K
描述
LIQUID CRYSTAL DISPLAY DRIVER, UUC128, 5.92 X 4.68 MM, ALUMINUM PAD, DIE-128

SED1528DAA 数据手册

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SED1526 Series  
• High-speed, 8-bit microprocessor interface allowing direct  
connection to both the 8080 and 6800  
• Supported serial interface  
OVERVIEW  
The SED1526 series is a single-chip LCD driver for dot-matrix  
liquid crystal displays (LCD’s). It accepts serial or 8-bit parallel  
display data directly from a microprocessor and stores data in an on-  
chip display RAM. It can generate an LCD drive signal independent  
from microprocessor clock.  
• Rich command functions (upward compatible to SED 1520  
Series); they are Read/Write Display Data, Display On/Off  
Switching, Set Page Address, Set Initial Display Line, Set  
Column Address, Read Status, Static Drive On/Off Switch-  
ing, Select Duty, Duty+1, Read-Modify-Write, Select  
Segment Driver Direction, Power Save, Reset, Set Power  
Control, Set Electronic Controls, Clock Stop.  
• On-chip CR oscillator circuit  
• On-chip LCD power circuit (The on-chip and external LCD  
power supplies are software selectable.)  
• Very low power consumption  
• Flexible power voltages; 2.4 to 6.0 V (VDD-VSS) and -13.0  
to -4.0 V (VDD-V5)  
• -40 to +85°C wide operating temperature range  
• CMOS process  
As the SED1526 series features the very low power dissipation and  
wide operating voltage range, it can easily realize a powerful but  
compact display unit having a small battery.  
A single chip of SED1526 series can drive a 17×80-pixel or 33×64-  
pixel LCD panel.  
(Note: The SED1526 series are not designed to have EMI resist-  
ance.)  
FEATURES  
• Direct data display using the display RAM. When RAM  
data bit is 0, it is not displayed; when 1, it is displayed.  
• Large 80×33-bit RAM capacity  
• 128-pin QFP5 package with aluminum pad or gold bump  
• On-chip LCD driver circuit (97 segment and common  
drivers)  
Series Specifications (for 128-pin flat package)  
Operating clock fCL  
(Internal OSC) (TYP.)  
Segment  
driver  
Common  
driver  
VREG  
type  
COM  
pin positions  
Model  
Duty  
QFP  
SED1526F0A  
SED1526FBA  
SED1526FAA  
SED1526FEA  
SED1526FEY  
SED1528F0A  
SED1528DBB  
2.9  
5.8  
2.9  
Type A  
Type B  
Type 1  
5
1/8, 1/9, 1/16, 1/17  
80  
64  
17  
33  
20 kHz  
2.9  
2.9  
2.9  
5.8  
Type 2  
Type 1  
26  
5
Type A  
1/32, 1/33  
VREG type  
Type 1 VREG (Built-in power supply regulating voltage)  
Temperature gradient: -0.17% /°C  
Type 2 VREG (Built-in power supply regulating voltage)  
Temperature gradient: 0.00% /°C  
COMS pin positions Refer to No. P3 (Package pin layout), No. P4 (PAD layout) and No. P5 (PAD coordinates).  
An SED1526 series package has one of following subcodes according to its package type (an example of SED1526):  
SED1526F  
:
128-pin QFP5 flat package  
**  
SED1526F Y: 128-pin QFP26 flat package  
*
SED1526D  
**  
:
Bear chip  
SED1526D A having aluminum pad  
*
SED1526D B having gold bump  
*
SED1526T**: TCP  
EPSON  
4–1  

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