SED1351
SED1351
GRAPHICS LCD CONTROLLER
■ DESCRIPTION
The SED1351F is a graphics LCD controller capable of controlling medium to large resolution displays. It
transfers data from MPU to external frame buffer RAM and converts this data to display signals for LCD
drivers. The SED1351F can display images with 4 gray shades and support display duty cycle as high as 1/
1024.
The SED1351F is designed to achieve high efficiency and data throughput to the LCD. It has a cycle steal
mode which allows MPU to access frame buffer RAM without interfering with the display operation. The
SED1351F can directly interface with up to eight 64K-bit SRAMs or two 256K-bit SRAMs.
The SED1351F can operate with either 5V or 3V power supply. The 5V version chip is the SED1351F0A and
the 3V version chip is the SED1351FLB.
■ FEATURES
Low-power CMOS technology
Maximum number of rows
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8-bit or 16-bit MPU data interface
Directinterfacewith80xx,Z80and68xxxMPU
Binary mode ............ 2048
Gray mode .............. 1024
Maximum number of rows:
4- or 8-bit panel data bus for single panel and
4-bit bus for dual panel
Single panel ............ 1024
Dual panel ...............2048
SupportlogicalORoflayersandpaneldivision
Smooth vertical scrolling
Maximumdisplaysizeswhen64K-byteSRAMs
are used:
Virtual screen display up to 1024
Binary mode ............ 2048 × 256 / 1024 × 512
Gray mode .............. 1024 × 256 / 512 × 512
Binary mode (on/off only) generates black &
white images
Available models:
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Gray mode (on/off and two gray steps) gener-
ates images with 4 gray shades
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SED1351F0A ............ 5V, QFP5-100 pin
SED1351FLB ............ 3V,QFP15-100 pin
■ SYSTEM BLOCK DIAGRAM
CLOCK
DATA
CONTROL
ADDRESS
MONO LCD
SED1351F
MPU
80xx
Z80
68xxx
SRAM
8 of 8K × 8 or
2 of 32K × 8
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