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SDC-632-A-H-3-R PDF预览

SDC-632-A-H-3-R

更新时间: 2024-11-08 23:33:39
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其他 - ETC 转换器
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描述
Synchro-to-Digital Converter

SDC-632-A-H-3-R 数据手册

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S DC-6 3 0 /6 3 2 /6 3 4 * A/S T  
1 0 -, 1 2 -, OR 1 4 -BIT S YNCHRO-TO-DIGITAL/  
RES OLVER-TO-DIGITAL CONVERTER  
LOWER COST! PIN-FOR-PIN REPLACEMENT FOR  
SDC-630/632/634 SERIES. FOR ALL NEW DESIGNS!  
FEATURES  
DESCRIPTION  
APPLICATIONS  
Low Cost Pin-for-Pin  
The SDC-630/632/634 A/ST series These converters may be used wher-  
are low cost, low profile synchro-to- ever analog angle data from a syn-  
digital (S/D) and resolver-to-digital chro or resolver must be rapidly and  
(R/D) tracking converters with stan- accurately converted to digital form  
dard pin configurations. They use a for transmission, storage or analysis.  
unique control transformer algorithm Because these units are extremely  
that provides inherently higher accu- rugged and stable, and meet the  
racy and jitter-free output. Utilizing a requirements on MIL-STD-202E, they  
type II servo loop, these converters are suitable for the most severe  
have no velocity lag up to the speci- industrial, commercial and military  
fied tracking rate, and output data is applications. Military ground support  
always fresh and continuously avail- and avionics uses include ordnance  
able. Each unit is fully trimmed and control, radar tracking systems, navi-  
requires no adjustment or field cali- gation and collision avoidance sys-  
Replacement  
for SDC-630/632/634 Series  
Industry Standard Low Profile  
Modular Converters  
Accuracy:  
10 Bit: 21 Minutes  
12 Bit: 8.5 Minutes  
14 Bit: 4 Minutes, 0.9 LSB or  
2.6 Minutes (High Accuracy)  
bration.  
tems.  
Options (Consult Factory):  
Velocity Input  
BIT: Built-In-Test  
16-Bit Resolution  
INPUT OPTIONS  
RESISTOR (ST)  
DIVIDER  
SYNCHRO INPUT OPTION (A)  
S1  
S2  
S3  
θ
SIN  
SCOTT-T  
VEL  
TRANSFORMER  
θ
COS  
VELOCITY  
ERROR  
PROCESSOR  
AND  
REFERENCE (A)  
ISOLATION  
RH  
RL  
(OPTIONAL)  
INH  
INHIBIT  
REF  
DEMODULATOR  
)
− φ  
(θ  
SIN  
VOLTAGE  
TRANSFORMER  
RESOLVER INPUT OPTION (A)  
CONTROLLED  
OSCILLATOR  
CB  
S1  
S2  
S3  
S4  
CONVERTER  
BUSY  
RESOLVER  
ISOLATION  
TRANSFORMER  
θ
SIN  
− φ)  
(θ  
COS  
ω t  
SIN  
θ
COS  
θ
SIN  
INPUT  
OPTION  
SYNCHRO INPUT OPTION (ST)  
SOLID STATE  
CONTROL  
θ
COS  
UP-DOWN COUNTER  
(CONTAINS ANGLE φ  
SOLID STATE  
SCOTT-T  
BUFFER  
θ
S1  
S2  
S3  
SIN  
TRANSFORMER  
(CT)  
)
θ
COS  
RESOLVER INPUT OPTION (ST)  
BIT  
1
S1  
S2  
S3  
S4  
SOLID STATE  
RESOLVER  
BUFFER  
θ
SIN  
θ
COS  
BIT 10,  
12 OR 14  
BIT  
1
BIT 10, 12, OR 14  
(LSB)  
(MSB)  
FIGURE 1. SDC-630/632/634 A/ST BLOCK DIAGRAM  
* Patented  
1993, 1999 Data Device Corporation  
©

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