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SCN2661AC1N28

更新时间: 2024-11-11 22:22:15
品牌 Logo 应用领域
恩智浦 - NXP PC通信
页数 文件大小 规格书
19页 131K
描述
Enhanced programmable communications interface EPCI

SCN2661AC1N28 数据手册

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Philips Semiconductors  
Product specification  
Enhanced programmable communications  
interface (EPCI)  
SCN2661/SCN68661  
DESCRIPTION  
PIN CONFIGURATIONS  
The Philips Semiconductors SCN2661 EPCI is a universal  
synchronous/asynchronous data communications controller chip  
that is an enhanced version of the SCN2651. It interfaces easily to  
all 8-bit and 16-bit microprocessors and may be used in a polled or  
interrupt driven system environment. The SCN2661 accepts  
programmed instructions from the microprocessor while supporting  
many serial data communications disciplines —synchronous and  
asynchronous — in the full- or half-duplex mode. Special support  
for BISYNC is provided.  
D2  
D3  
D1  
D0  
V
1
2
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
RxD  
GND  
D4  
3
CC  
RxC/BKDET  
DTR  
4
5
D5  
RTS  
6
The EPCI serializes parallel data characters received from the  
microprocessor for transmission. Simultaneously, it can receive  
serial data and convert it into parallel data characters for input to the  
microcomputer.  
D6  
DSR  
7
DIP  
D7  
RESET  
BRCLK  
TxD  
8
TxC/XSYNC  
9
A1  
CE  
A0  
10  
11  
12  
13  
14  
The SCN2661 contains a baud rate generator which can be  
programmed to either accept an external clock or to generate  
internal transmit or receive clocks. Sixteen different baud rates can  
be selected under program control when operating in the internal  
clock mode. Each version of the EPCI (A, B, C) has a different set  
of baud rates.  
TxEMT/DSCHG  
CTS  
R/W  
DCD  
RxRDY  
TxRDY  
FEATURES  
Synchronous operation  
INDEX  
CORNER  
4
1
26  
5- to 8-bit characters plus parity  
5
25  
Single or double SYN operation  
Internal or external character synchronization  
Transparent or non-transparent mode  
Transparent mode DLE stuffing (Tx) and detection (Rx)  
PLCC  
11  
19  
Automatic SYN or DLE-SYN insertion SYN, DLE and DLESYN  
stripping  
12  
18  
TOP VIEW  
Odd, even, or no parity  
NOTE:  
Local or remote maintenance loopback mode  
Baud rate: DC to 1Mbps (1X clock)  
Pin Functions the same as 28-pin DIP.  
SD00077  
Asynchronous operation  
5- to 8-bit characters plus parity  
1, 1-1/2 or 2 stop bits transmitted  
Odd, even, or no parity  
Dynamic character length switching  
Full- or half-duplex operation  
TTL compatible inputs and outputs  
Parity, overrun and framing error detection  
Line break detection and generation  
False start bit detection  
RxC and TxC pins are short-circuit protected  
Single +5V power supply  
No system clock required  
Automatic serial echo mode (echoplex)  
Local or remote maintenance loopback mode  
Baud rate: DC to 1Mbps  
(1X clock)  
APPLICATIONS  
DC to 62.5kbps (16X clock)  
DC to 15.625kbps  
(64X clock)  
Intelligent terminals  
Network processors  
Front-end processors  
Remote data concentrators  
OTHER FEATURES  
Computer-to-computer links  
Serial peripherals  
Internal or external baud rate clock  
3 baud rate sets  
BISYNC adaptors  
16 internal rates for each set  
Double-buffered transmitter and receiver  
1
1994 Apr 27  
853-1070 12793  

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