Datasheet > SC9256

SC9256

更新时间： 2024-11-08 22:22:19

品牌	Logo	应用领域
士兰微 - SILAN		/
页数	文件大小	规格书
24页	223K
描述
PLL FOR DTS

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中文翻译

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数据手册

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SC9256 数据手册

Silan

Semiconductors

SC9256

PLL FOR DTS

DESCRIPTION

The SC9256 is phase-locked loop (PLL) LSIs for digital tuning

systems (DTS) with built in 2 modulus prescalers.

All functions ate controlled through 3 serial bus lines. These LSIs

are used to configure high-performance digital tuning system.

DIP-16-300-2.54

SOP-16-300-1.27

FEATURES

* Optimal for configuring digital tuning systems in high-fi tuners

and car stereos.

* built-in prescalers. Operate at input frequency ranging from

30~150 MHz during FMIN input (with 2 modulus prescaler) and

at 0.5~40MHz during AMIN input (with 2 modulus prescaler or

direct dividing).

16 bit programmable counter, dual parallel output phase

comparator, crystal oscillator and reference counter.

* Standby mode function (turns off FM, AM

and IF amps) to save current

consumption.

* 3.6MHz, 4.5MHz, 7.2MHz or 10.8MHz crystal oscillators can be

used.

* All functions controlled through 3 serial

bus lines.

* 15 possible reference frequencies. ( When using 4.5MHz crystal)

Built-in 20 bit general-purpose counter for such uses as

measuring intermediate frequencies (IFIN1 and IFIN2)

* CMOS structure with operating power

supply range of VDD=5.0±0.5V.

* High-precision (±0.55~±7.15µs) PLL phase error detection.

* Numerous general-purpose I/O pins for such uses as peripheral ORDERING INFORMATION

circuit control.

Device

SC9256

SC9256S

Package

* 3 N-channel open-drain output ports (OFF withstanding

voltage:12V) for such uses as control signal output.

DIP-16-300-2.54

SOP-16-300-1.27

PIN CONFIGURATION

16 DO2/OT-4

15 DO1

PERIOD

CLOCK

DATA

OT-1

14 I/O-5/IF^IN1

I/O-6/IF^IN2

GND

SC9256

11 FMIN

10 AMIN

OT-2

OT-3

VDD

HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD

REV: 1.0

2002.01.30.

12 3 4 5 6 7...24

中文翻译

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