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SC16C752IB48,151 PDF预览

SC16C752IB48,151

更新时间: 2024-01-06 07:39:59
品牌 Logo 应用领域
恩智浦 - NXP 通信时钟数据传输先进先出芯片外围集成电路
页数 文件大小 规格书
47页 202K
描述
SC16C752 - Dual UART with 64-byte FIFO QFP 48-Pin

SC16C752IB48,151 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:QFP包装说明:LFQFP, QFP48,.35SQ,20
针数:48Reach Compliance Code:compliant
HTS代码:8542.31.00.01风险等级:5.73
其他特性:ALSO OPERATES AT 2.5 V SUPPLY地址总线宽度:3
边界扫描:NO最大时钟频率:80 MHz
通信协议:ASYNC, BIT最大数据传输速率:0.625 MBps
外部数据总线宽度:8JESD-30 代码:S-PQFP-G48
JESD-609代码:e3长度:7 mm
低功率模式:YES湿度敏感等级:1
串行 I/O 数:2端子数量:48
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装等效代码:QFP48,.35SQ,20封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE, FINE PITCH峰值回流温度(摄氏度):260
电源:3.3/5 V认证状态:Not Qualified
座面最大高度:1.6 mm子类别:Serial IO/Communication Controllers
最大供电电压:3.63 V最小供电电压:2.97 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:7 mm
uPs/uCs/外围集成电路类型:SERIAL IO/COMMUNICATION CONTROLLER, SERIALBase Number Matches:1

SC16C752IB48,151 数据手册

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SC16C752  
Dual UART with 64-byte FIFO  
Rev. 04 — 20 June 2003  
Product data  
1. Description  
The SC16C752 is a dual universal asynchronous receiver/transmitter (UART) with  
64-byte FIFOs, automatic hardware/software flow control, and data rates up to  
5 Mbits/s (3.3 V and 5 V). The SC16C752 offers enhanced features. It has a  
transmission control register (TCR) that stores receiver FIFO threshold levels to  
start/stop transmission during hardware and software flow control. With the FIFO  
RDY register, the software gets the status of TXRDY/RXRDY for all four ports in one  
access. On-chip status registers provide the user with error indications, operational  
status, and modem interface control. System interrupts may be tailored to meet user  
requirements. An internal loop-back capability allows on-board diagnostics.  
The UART transmits data, sent to it over the peripheral 8-bit bus, on the TX signal and  
receives characters on the RX signal. Characters can be programmed to be 5, 6, 7, or  
8 bits. The UART has a 64-byte receive FIFO and transmit FIFO and can be  
programmed to interrupt at different trigger levels. The UART generates its own  
desired baud rate based upon a programmable divisor and its input clock. It can  
transmit even, odd, or no parity and 1, 1.5, or 2 stop bits. The receiver can detect  
break, idle, or framing errors, FIFO overflow, and parity errors. The transmitter can  
detect FIFO underflow. The UART also contains a software interface for modem  
control operations, and has software flow control and hardware flow control  
capabilities.  
The SC16C752 is available in a plastic LQFP48 package.  
2. Features  
Pin compatible with SC16C2550 with additional enhancements  
Up to 5 Mbits/s baud rate (at 3.3 V and 5 V; at 2.5 V maximum baud rate is  
3 Mbits/s)  
64-byte transmit FIFO  
64-byte receive FIFO with error flags  
Programmable and selectable transmit and receive FIFO trigger levels for DMA  
and interrupt generation  
Software/hardware flow control  
Programmable Xon/Xoff characters  
Programmable auto-RTS and auto-CTS  
Optional data flow resume by Xon any character  
DMA signalling capability for both received and transmitted data  
Supports 5 V, 3.3 V and 2.5 V operation  
Software selectable baud rate generator  
Prescaler provides additional divide-by-4 function  
 
 

SC16C752IB48,151 替代型号

型号 品牌 替代类型 描述 数据表
SC16C752IB48,128 NXP

类似代替

SC16C752 - Dual UART with 64-byte FIFO QFP 48-Pin
SC16C752IB48 NXP

类似代替

Dual UART with 64-byte FIFO

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