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SA9101 PDF预览

SA9101

更新时间: 2024-11-06 03:33:43
品牌 Logo 应用领域
SAMES PC
页数 文件大小 规格书
40页 713K
描述
PCM FRAME ALIGNER

SA9101 数据手册

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sames  
SA9101  
PCM FRAME ALIGNER  
Error counters for code errors  
FEATURES  
n
n
n
Framealignment/synthesisforPCM30  
double frame and CRC-multiframe  
format.  
(switchableto"Szeroscounter"),frame  
i
errors and CRC4 errors  
Sub-multiframe assigned CRC Error  
indication with possibility of automatic  
insertion in Si-bit position of outgoing  
multiframe.  
n
n
Meets CCITT Rec.G704  
Interface to route selectable between  
HDB3 and fibre optical  
n
HDB3outputsswitchablebetweenfully  
bauded and half bauded format  
n
Simplified data transfer between  
SA9101 and controller, supported by  
data stacks for receive and transmit  
signalling data, selectable interrupt-  
sources and DMA facilities.  
n
n
Error checking via CRC4 procedure  
Insertion and extraction of alarms and  
facility signals  
n
n
n
Double frame marker for serial data  
extraction support  
n
n
n
n
Selectable system - clock (4096 kHz/  
8192 kHz)  
Repeated transmission of signalling  
data, if not updated.  
Selectable Interface mode (2048/4096  
kBit/s) to system internal highway  
Three transparent modes for timeslot 0  
in transmit direction  
Programmable offsets for receive and  
transmit data  
n
n
n
Transparentmodeforreceivedirection  
HDB3 error indication  
Two frame receive buffer for receive  
route clock wander and jitter  
compensation  
Idle channel data insertion selectable  
for any timeslot  
n
n
Channelloopbackcapabilities,testand  
diagnostic capabilities  
n
n
Slip detection and direction indication  
Extended HDB3 error detection  
Parity checks  
DESCRIPTION:  
The SA9101 (Frame Alignment unit for PCM30 Systems) is a C-MOS device which  
implements the interface to PCM30 Transmission Systems.  
In the receive direction, the device performs HDB3 decoding, Frame alignment  
(selectable between doubleframe and CRC-Multiframe) and extraction of signalling  
data.  
Wander absorption between the PCM carrier and the system internal highway is  
performed using an internal 2 frame memory. The incoming data stream is monitored  
1/40  
09-09-94  
and  
M71-1797  
PDS039-SA9101-001  
REV.A  

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