5秒后页面跳转
S3027A1 PDF预览

S3027A1

更新时间: 2024-02-17 05:33:12
品牌 Logo 应用领域
AMCC ATM异步传输模式电信光电二极管电信集成电路
页数 文件大小 规格书
10页 97K
描述
ATM/SONET/SDH Clock Recovery Circuit, 1-Func, Bipolar, PDSO20, TSSOP-20

S3027A1 技术参数

生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP, TSSOP20,.25针数:20
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.84JESD-30 代码:R-PDSO-G20
长度:6.5 mm功能数量:1
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP20,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
电源:5 V认证状态:Not Qualified
座面最大高度:1.2 mm子类别:ATM/SONET/SDH ICs
最大压摆率:0.11 mA标称供电电压:5 V
表面贴装:YES技术:BIPOLAR
电信集成电路类型:ATM/SONET/SDH CLOCK RECOVERY CIRCUIT温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL宽度:4.4 mm
Base Number Matches:1

S3027A1 数据手册

 浏览型号S3027A1的Datasheet PDF文件第2页浏览型号S3027A1的Datasheet PDF文件第3页浏览型号S3027A1的Datasheet PDF文件第4页浏览型号S3027A1的Datasheet PDF文件第5页浏览型号S3027A1的Datasheet PDF文件第6页浏览型号S3027A1的Datasheet PDF文件第7页 
®
DEVICE  
SPECIFICATION  
S3027  
SONET/SDH/ATM CLOCK RECOVERY UNIT  
GENERAL DESCRIPTION  
FEATURES  
The function of the S3027 clock recovery unit is to  
derive high speed timing signals for SONET/SDH-  
based equipment. The S3027 is implemented using  
AMCC’s proven Phase Locked Loop (PLL) technology.  
• Complies with Bellcore and ITU-T  
specifications for jitter tolerance, jitter transfer  
and jitter generation  
• On-chip high frequency PLL with internal loop  
filter for clock recovery  
The S3027 receives either an OC-12/STM-4 or OC-3/  
STM-1 scrambled NRZ signal and recovers the clock  
from the data. The chip outputs a differential PECL  
bit clock and retimed data. Figure 1 shows a typical  
network application.  
• Supports clock recovery for OC-12/STM-4  
(S3027A) (622.08 Mbit/s) or  
OC-3/STM-1 (155.52 Mbit/s) (S3027A-1)  
NRZ data  
• 19.44 MHz reference frequency  
• Lock detect—monitors run length (S3027A only)  
and frequency  
• 350mW typical power dissipation  
• Low-jitter PECL interface  
• Maintains downstream clock in absence of data  
inputs  
• Micro-power Bipolar technology  
• 5V supply  
The S3027 utilizes an on-chip PLL which consists of  
a phase detector, a loop filter, and a voltage con-  
trolled oscillator (VCO). The phase detector  
compares the phase relationship between the VCO  
output and the serial data input. A loop filter converts  
the phase detector output into a smooth DC voltage,  
and the DC voltage is input to the VCO whose fre-  
quency is varied by this voltage. A block diagram is  
shown in Figure 2.  
• Available in a 20 TSSOP package  
Figure 1. System Block Diagram  
8
8
S3027  
Transceiver  
S3028  
Fiber  
Optic  
Module  
Fiber  
Optic  
Module  
Transceiver  
S3028  
Controller  
Controller  
8
8
S3027  
October 18, 1999 / Revision E  
1

与S3027A1相关器件

型号 品牌 获取价格 描述 数据表
S3027A-1 AMCC

获取价格

CLOCK RECOVERY CIRCUIT, PDSO20, TSSOP-20
S3028 ASI

获取价格

SILICON ABRUPT VARACTOR DIODE
S3028A TOSHIBA

获取价格

VARACTOR DIODE,SINGLE,2PF C(T),PIN
S3028B ROCHESTER

获取价格

Transceiver, 1-Func, PQFP64, PLASTIC, QFP-64
S3028B AMCC

获取价格

Transceiver, 1-Func, BICMOS, PQFP64, PLASTIC, QFP-64
S3028B-1 ROCHESTER

获取价格

Transceiver, 1-Func, PQFP64, PLASTIC, QFP-64
S3028B-1 AMCC

获取价格

Transceiver, 1-Func, BICMOS, PQFP64, PLASTIC, QFP-64
S3029 AMCC

获取价格

SONET/SDH/ATM 155 MBIT/S QUAD TRANSCEIVER
S3029A AMCC

获取价格

SONET/SDH/ATM 155 MBIT/S QUAD TRANSCEIVER
S3029AI AMCC

获取价格

ATM/SONET/SDH Transceiver, PQFP64,