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S3026A-1 PDF预览

S3026A-1

更新时间: 2024-11-27 14:44:35
品牌 Logo 应用领域
AMCC 电信光电二极管电信集成电路
页数 文件大小 规格书
11页 102K
描述
CLOCK RECOVERY CIRCUIT, PDSO20, TSSOP-20

S3026A-1 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP,
针数:20Reach Compliance Code:unknown
风险等级:5.92Is Samacsys:N
JESD-30 代码:R-PDSO-G20JESD-609代码:e0
长度:6.5 mm功能数量:1
端子数量:20最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified座面最大高度:1.2 mm
标称供电电压:5 V表面贴装:YES
技术:BIPOLAR电信集成电路类型:CLOCK RECOVERY CIRCUIT
温度等级:COMMERCIAL端子面层:TIN LEAD
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4.4 mmBase Number Matches:1

S3026A-1 数据手册

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®
DEVICE  
SPECIFICATION  
S3026  
SONET/SDH/ATM CLOCK RECOVERY UNIT  
GENERAL DESCRIPTION  
FEATURES  
The function of the S3026 clock recovery unit is to  
derive high speed timing signals for SONET/SDH-  
based equipment. The S3026 is implemented using  
AMCC’s proven Phase Locked Loop (PLL) technology.  
• Complies with Bellcore and ITU-T  
specifications for jitter tolerance, jitter transfer  
and jitter generation  
• On-chip high frequency PLL with internal loop  
filter for clock recovery  
The S3026 receives either an OC-12/STM-4 or OC-3/  
STM-1 scrambled NRZ signal and recovers the clock  
from the data. The chip outputs a differential PECL  
bit clock and retimed data. Figure 1 shows a typical  
network application.  
• Supports clock recovery for OC-12/STM-4  
(S3026A) (622.08 Mbit/s) or  
OC-3/STM-1 (155.52 Mbit/s) (S3026A-1)  
NRZ data  
• 19.44 MHz reference frequency  
• Lock detect—monitors run length (S3026A only)  
and frequency  
• 350 mW typical power dissipation  
• Low-jitter PECL interface  
The S3026 utilizes an on-chip PLL which consists of  
a phase detector, a loop filter, and a voltage con-  
trolled oscillator (VCO). The phase detector  
compares the phase relationship between the VCO  
output and the serial data input. A loop filter converts  
• Maintains downstream clock in absence of data  
inputs  
• Micro-power Bipolar technology  
• 5V supply  
• Available in a 20 TSSOP package  
Figure 1. System Block Diagram  
8
8
S3026  
Transceiver  
S3028  
Fiber  
Optic  
Module  
Fiber  
Optic  
Module  
Transceiver  
S3028  
Controller  
Controller  
8
8
S3026  
October 18, 1999 / Revision G  
1

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