S29GLxxxN MirrorBitTM Flash Family
S29GL512N, S29GL256N, S29GL128N
512 Megabit, 256 Megabit, and 128 Megabit,
3.0 Volt-only Page Mode Flash Memory featuring
110 nm MirrorBit process technology
ADVANCE
INFORMATION
Datasheet
Distinctive Characteristics
— 56-pin TSOP/RTSOP
— 64-ball Fortified BGA
Architectural Advantages
Single power supply operation
— 3 volt read, erase, and program operations
Software & Hardware Features
Enhanced VersatileI/O™ control
Software features
— All input levels (address, control, and DQ input levels)
and outputs are determined by voltage on VIO input.
— Program Suspend & Resume: read other sectors
before programming operation is completed
— Erase Suspend & Resume: read/program other
sectors before an erase operation is completed
— Data# polling & toggle bits provide status
— Unlock Bypass Program command reduces overall
multiple-word or byte programming time
— CFI (Common Flash Interface) compliant: allows host
system to identify and accommodate multiple flash
devices
V
IO range is 1.65 to VCC
Manufactured on 110 nm MirrorBit process
technology
SecSi™ (Secured Silicon) Sector region
— 128-word/256-byte sector for permanent, secure
identification through an 8-word/16-byte random
Electronic Serial Number, accessible through a
command sequence
— May be programmed and locked at the factory or by
the customer
Hardware features
— Advanced Sector Protection
Flexible sector architecture
— S29GL512N: Five hundred twelve 64 Kword (128
Kbyte) sectors
— WP#/ACC input accelerates programming time
(when high voltage is applied) for greater throughput
during system production. Protects first or last sector
regardless of sector protection settings
— Hardware reset input (RESET#) resets device
— Ready/Busy# output (RY/BY#) detects program or
erase cycle completion
— S29GL256N: Two hundred fifty-six 64 Kword (128
Kbyte) sectors
— S29GL128N: One hundred twenty-eight 64 Kword
(128 Kbyte) sectors
Compatibility with JEDEC standards
— Provides pinout and software compatibility for single-
power supply flash, and superior inadvertent write
protection
100,000 erase cycles per sector
20-year data retention
Performance Characteristics
High performance
— 80 ns access time (S29GL128N, S29GL256N),
90 ns access time (S29GL512N)
— 8-word/16-byte page read buffer
— 16-word/32-byte write buffer
— 25 ns page read times
— 16-word/32-byte write buffer reduces overall
programming time for multiple-word updates
Low power consumption (typical values at 3.0 V, 5
MHz)
— 30 mA typical interpage active read current;
10 mA typical intrapage active read current
— 50 mA typical erase/program current
— 1 µA typical standby mode current
Package options
Publication Number 27631 Revision A Amendment 1 Issue Date October 16, 2003
This document contains information on a product under development at FASL LLC. The information is intended to help you evaluate this product. FASL LLC reserves the
right to change or discontinue work on this proposed product without notice.