S29CD-G Flash Family
S29CD032G, S29CD016G
32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit)
2.5 Volt-only Burst Mode, Dual Boot,
Simultaneous Read/Write Flash Memory
with VersatileI/O™ featuring 170 nm Process Technology
Data Sheet (Preliminary)
Distinctive Characteristics
– Standby mode: CMOS: 60 µA max
Architecture Advantages
Simultaneous Read/Write Operations
1 million write cycles per sector typical
20 year data retention typical
– Read data from one bank while executing erase/program functions
in other bank
VersatileI/O™ Control
– Zero latency between read and write operations
– Two bank architecture: large bank/small bank 75% / 25%
– Generates data output voltages and tolerates data input voltages as
determined by the voltage on the V pin
IO
– 1.65 V to 3.60 V compatible I/O signals
User-Defined x32 Data Bus
Dual Boot Block
Software Features
– Top and bottom boot sectors in the same device
Persistent Sector Protection
Flexible Sector Architecture
– Locks combinations of individual sectors and sector groups to
prevent program or erase operations within that sector (requires
– CD032G: Eight 2K Double Word, Sixty-two 16K Double Word, and
Eight 2K Double Word sectors
– CD016G: Eight 2K Double Word, Thirty-two 16K Double Word, and
Eight 2K Double Word sectors
only V levels)
CC
Password Sector Protection
– Locks combinations of individual sectors and sector groups to
prevent program or erase operations within that sector using a user-
definable 64-bit password
Secured Silicon Sector (256 Bytes)
– Factory locked and identifiable: 16 bytes for secure, random factory
Electronic Serial Number; Also know as Electronic Marking
Supports Common Flash Interface (CFI)
Unlock Bypass Program Command
Manufactured on 170 nm Process Technology
Programmable Burst Interface
– Reduces overall programming time when issuing multiple program
command sequences
– Interfaces to any high performance processor
– Linear Burst Read Operation: 2, 4, and 8 double word linear burst
with or without wrap around
Data# Polling and Toggle Bits
– Provides a software method of detecting program or erase operation
completion
Program Operation
– Performs synchronous and asynchronous write operations of burst
configuration register settings independently
Hardware Features
Single Power Supply Operation
Program Suspend/Resume & Erase Suspend/Resume
– Optimized for 2.5 to 2.75 volt read, erase, and program operations
– Suspends program or erase operations to allow reading,
programming, or erasing in same bank
Compatibility with JEDEC standards (JC42.4)
– Software compatible with single-power supply Flash
– Backward-compatible with AMD/Fujitsu Am29LV/MBM29LV and
Am29F/MBM29F flash memories
Hardware Reset (RESET#), Ready/Busy# (RY/BY#), and Write
Protect (WP#) Inputs
ACC Input
– Accelerates programming time for higher throughput during system
production
Performance Characteristics
High Performance Read Access
Package Options
– 80-pin PQFP
– Initial/random access times of 48 ns (32 Mb) and 54 ns (16 Mb)
– Burst access times of 7.5 ns (32 Mb) or 9 ns (16Mb)
– 80-ball Fortified BGA
– Pb-free package option also available
– Known Good Die
Ultra Low Power Consumption
– Burst Mode Read: 90 mA @ 75 MHz max
– Program/Erase: 50 mA max
Publication Number S29CD-G_00
Revision B
Amendment 0
Issue Date November 14, 2005
This document states the current technical specifications regarding the Spansion product(s) described herein. The Preliminary status of this document indicates that product qual-
ification has been completed, and that initial production has begun. Due to the phases of the manufacturing process that require maintaining efficiency and quality, this document
may be revised by subsequent versions or modifications due to changes in technical specifications.
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